LAN9250 datasheet(286/421 Pages) MICROCHIP

286 / 421 page

LAN9250

DS00001913A-page 286

 2015 Microchip Technology Inc.

Figure 13-5 illustrates a typical I2C EEPROM sequential byte reads for single and double byte addressing.

Sequential reads are used by the EEPROM Loader. Refer to Section 13.4, "EEPROM Loader" for additional information.

For a register level description of a read operation, refer to Section 13.3.7, "I2C Master EEPROM Controller Operation,"

on page 288.

13.3.4

I2C EEPROM BYTE WRITES

Following the device addressing, a data byte may be written to the EEPROM by outputting the data after receiving the

acknowledge from the EEPROM. The data byte is acknowledged by the EEPROM slave and the I2C master finishes

the write cycle with a stop condition. If the EEPROM slave fails to send an acknowledge, then the sequence is aborted

(a start condition and a stop condition are sent) and the EEPROM Controller Timeout (EPC_TIMEOUT) bit in the

EEPROM Command Register (E2P_CMD) is set.

Following the data byte write cycle, the I2C master will poll the EEPROM to determine when the byte write is finished.

After meeting the minimum bus free time, a start condition is sent followed by a control byte with a control code of 1010b,

chip/block select bits low (since they are don’t cares) and the R/~W bit low. If the EEPROM is finished with the byte

write, it will respond with an acknowledge. Otherwise, it will respond with a no-acknowledge and the I2C master will issue

a stop and repeat the poll. If the acknowledge does not occur within 30 ms, a timeout occurs (a start condition and a

stop condition are sent) and the EEPROM Controller Timeout (EPC_TIMEOUT) bit in the EEPROM Command Register

(E2P_CMD) is set. The check for timeout is only performed following each no-acknowledge, since it may be possible

that the EEPROM write finished before the timeout but the 30 ms expired before the poll was performed (due to the bus

being used by another master).

Once the I2C master receives the acknowledge, it concludes by sending a start condition, followed by a stop condition,

which will place the EEPROM into standby.

Figure 13-6 illustrates a typical I2C EEPROM byte write.

FIGURE 13-5:

I2C EEPROM SEQUENTIAL BYTE READS

FIGURE 13-6:

I2C EEPROM BYTE WRITE

S 1 0 1 0

Control Byte

S 1 0 1 0

Control Byte

Single Byte Addressing Sequential Reads

0 0 0

Data Byte

Double Byte Addressing Sequential Reads

...

R/~W

Chip / Block

Select Bits

R/~W

Chip / Block

Select Bits

...

Data Byte

S 1 0 1 0

Control Byte

Chip / Block

Select Bits

0 0 0

S 1 0 1 0

Control Byte

Chip / Block

Select Bits

0 0 0

S 1 0 1 0

Control Byte

Chip / Block

Select Bits

0 0 0

...

S P

Poll Cycle

Data Cycle

Conclude

bus

free

time

bus

free

time

...

bus

free

time

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