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AD9694 Datasheet(PDF) 7 Page - Analog Devices

Part # AD9694
Description  14-Bit, 500 MSPS JESD204B, Quad Analog-to-Digital Converter
PDF  101 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9694 Datasheet(HTML) 7 Page - Analog Devices

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Data Sheet
AD9694
Rev. 0 | Page 7 of 101
Parameter1
Min
Typ
Max
Unit
WORST HARMONIC, SECOND OR THIRD
fIN = 10 MHz
−86
dBFS
fIN = 155 MHz
−81
dBFS
fIN = 305 MHz
−81
dBFS
fIN = 450 MHz
−84
dBFS
fIN = 765 MHz
−76
dBFS
fIN = 985 MHz
−75
dBFS
1
See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and for details on how these tests were completed.
Table 4. 600 MSPS Power Consumption
Parameter
Min
Typ
Max
Unit
POWER SUPPLY
AVDD1
0.95
0.975
1.00
V
AVDD1_SR
0.95
0.975
1.00
V
AVDD2
1.71
1.8
1.89
V
AVDD3
2.44
2.5
2.56
V
DVDD
0.95
0.975
1.00
V
DRVDD1
0.95
0.975
1.00
V
DRVDD2
1.71
1.8
1.89
V
SPIVDD
1.71
1.8
1.89
V
IAVDD1
352
513
mA
IAVDD1_SR
23
55
mA
IAVDD2
443
478
mA
IAVDD3
87
104
mA
IDVDD1
146
200
mA
IDRVDD12
183
235
mA
IDRVDD22
23
28
mA
ISPIVDD
1
1.6
mA
POWER CONSUMPTION
Total Power Dissipation (Including Output Drivers)3
1.75
2.16
W
1
Full bandwidth mode.
2
All lanes running. Power dissipation on DRVDD1 changes with lane rate and number of lanes used.
DIGITAL SPECIFICATIONS
AVDD1 = 0.975 V, AVDD1_SR = 0.975 V, AVDD2 = 1.8 V, AVDD3 = 2.5 V, DVDD = 0.975 V, DRVDD1 = 0.975 V, DRVDD2 = 1.8 V,
SPIVDD = 1.8 V, 500 MSPS, clock divider = 4, 1.8 V p-p full-scale differential input, 0.5 V internal reference, AIN = −1.0 dBFS, default SPI
settings, unless otherwise noted. Minimum and maximum specifications are guaranteed for the full operating junction temperature (TJ)
range of −40°C to +105°C. Typical specifications represent performance at TJ = 50°C (TA = 25°C).
Table 5.
Parameter
Min
Typ
Max
Unit
CLOCK INPUTS (CLK+, CLK−)
Logic Compliance
LVDS/LVPECL
Differential Input Voltage
600
800
1600
mV p-p
Input Common-Mode Voltage
0.69
V
Input Resistance (Differential)
32
kΩ
Input Capacitance
0.9
pF
SYSTEM REFERENCE (SYSREF INPUTS) (SYSREF+, SYSREF−)1
Logic Compliance
LVDS/LVPECL
Differential Input Voltage
400
800
1800
mV p-p
Input Common-Mode Voltage
0.6
0.69
2.2
V
Input Resistance (Differential)
18
22
kΩ
Input Capacitance (Single Ended per Pin)
0.7
pF



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