DS26401 datasheet(190/309 Pages) DALLAS

190 / 309 page

DS26401 Octal T1/E1/J1 Framer

190

RESCR

Receive Elastic Store Control Register

085h + (200h x n) : where n = 0 to 7, for Ports 1 to 8

Bit #

Name

RDATFMT

RGCLKEN

—

RSZS

RESALGN

RESR

RESMDM

RESE

Default

Bit 0 / Receive Elastic Store Enable (RESE)

0 = elastic store is bypassed

1 = elastic store is enabled

Bit 1 / Receive Elastic Store Minimum Delay Mode (RESMDM)

0 = elastic stores operate at full two frame depth

1 = elastic stores operate at 32-bit depth

Bit 2 / Receive Elastic Store Reset (RESR).

Setting this bit from a zero to a one will force the read pointer into the

same frame that the write pointer is exiting, minimizing the delay through the elastic store. If this command should

place the pointers within the slip zone (see bit 4), then an immediate slip will occur and the pointers will move back

to opposite frames. Should be toggled after RSYSCLK has been applied and is stable. Do not leave this bit set

HIGH.

Bit 3 / Receive Elastic Store Align (RESALGN).

Setting this bit from a zero to a one will force the receive elastic

store’s write/read pointers to a minimum separation of half a frame. No action will be taken if the pointer separation

is already greater or equal to half a frame. If pointer separation is less than half a frame, the command will be

executed and the data will be disrupted. Should be toggled after RSYSCLK has been applied and is stable. Must

be cleared and set again for a subsequent align.

Bit 4 / Receive Slip Zone Select (RSZS).

This bit determines the minimum distance allowed between the elastic

store read and write pointers before forcing a controlled slip. This bit is only applies during T1 to E1 or E1 to T1

conversion applications.

0 = force a slip at 9 bytes or less of separation (used for clustered blank channels)

1 = force a slip at 2 bytes or less of separation (used for distributed blank channels)

Bit 5 / Unused. Must be set = 0 for proper operation.

Bit 6 / Receive Gapped Clock Enable (RGPCKEN)

0 = RCHCLK functions normally

1 = Enable gapped bit clock output on RCHCLK

Bit 7 / Receive Channel Data Format (RDATFMT)

0 = 64kbps (data contained in all 8 bits)

1 = 56kbps (data contained in 7 out of the 8 bits)

RGPCKEN and RDATFMT are not associated with the elastic store and will be explained in the fractional support

section.

DS26401 Datasheet(PDF) 190 Page - Dallas Semiconductor

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