DA9021 datasheet(46/142 Pages) DIALOG

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DA9021/22

System PMIC with high efficiency USB power manager

Datasheet

Revision 2.5

17-Feb-2017

CFR0011-120-00 Rev 5

46 of 142

11 Functional description

DA9021

Host

processor

nIRQ

nONKEY

nRESET

Vdd

VBUS

DCIN

nSHUTDOWN

GPIO_x

OUT_32K

Control IF

PWR_UP

SYS_UP

Figure 23: Control ports and interface

11.1 Power manager IO ports

The power manager input ports are supplied either from the internal rail VDDCORE or VDD_IO,

selected via PM_I_V. The output ports are supplied from VDD_IO. During the initial start-up

sequence the power manager IO ports are in tri-state mode until being configured from OTP when

leaving RESET mode, except nRESET, nIRQ, PWR_UP/GP_FB2. Output ports are push-pull type

except for nRESET and nIRQ, which can also be configured to open drain.

11.2 On/off (nONKEY)

The nONKEY signal is a level active low wakeup interrupt/event intended to switch-on the

DA9021/22 supplied application. nONKEY is always enabled during POWERDOWN mode, so that

the application can be also switched-on with a disabled GPIO extender. The wakeup event can be

disabled via the interrupt mask M_nONKEY.

11.3 Hardware reset (nSHUTDOWN, nONKEY, GPIO14 & GPIO15)

A user-initiated hard reset at the DA9021/22 nSHUTDOWN is an active low input initiated typically by

a push button switch or an asserted error detection line from a host processor. The sequencer then

powers down all domains in reverse order down to step 0 and all supplies of DA9021/22 except

LDOCORE are switched off.

DA9021/22 includes a second hardware reset that follows the nONKEY after being asserted for a

period of 5 s ± 30 %. The same can be achieved by a parallel connection of GPI14 and GPI15 to

ground for 5 s ± 30 %.

This feature provides the ability to emergency turn-off the application in the event of a software lock-

up without the need for a dedicated RESET hardware switch or removing the battery.

After a minimum time-out of 500 ms DA9021/22 will start to power up again. It will wait for a valid

wakeup event (for example key press) or will start the power sequencer automatically. By asserting

EXT_WAKEUP it can request the host processor to control the subsequent start-up. Alternatively the

power up sequence can be performed autonomously by the PMIC following OTP pre-configurations.

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