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DA9021 Datasheet(PDF) 83 Page - Dialog Semiconductor

Part # DA9021
Description  System PMIC with high efficiency USB power manager
PDF  142 Pages
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Manufacturer  DIALOG [Dialog Semiconductor]
Direct Link  http://www.dialog-semiconductor.com/
Logo DIALOG - Dialog Semiconductor

DA9021 Datasheet(HTML) 83 Page - Dialog Semiconductor

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DA9021/22
System PMIC with high efficiency USB power manager
Datasheet
Revision 2.5
17-Feb-2017
CFR0011-120-00 Rev 5
83 of 142
© 2017 Dialog Semiconductor
16.1 Power sequencer
Table 65: ID 0 to 1
Register
address
Bit
Type
Label
Default
Description
R29
ID_0_1
0
R/W
NRES_MODE
1
0: No assertion of nRESET during
POWERDOWN mode
1: Assert nRESETwhen entering
POWERDOWN mode (release after leaving
POWERDOWN mode)
1
R/W
DEF_SUPPLY
0
When asserted all supplies (beside
LDOCORE) are enabled/disabled from OTP
default mode
2
R/W
0
RESERVED
7:4
R/W
LDO1_STEP
1001
Power sequencer time slot 9
Table 66: ID 2 to 3
Register
address
Bit
Type
Label
Default
Description
R30
ID_2_3
3:0
R/W
0000
RESERVED
7:4
R/W
LDO3_STEP
1000
Power sequencer time slot 8
Table 67: RESERVED
Register
address
Bit
Type
Label
Default
Description
R31
3:0
R/W
0000
RESERVED
7:4
R/W
0000
RESERVED
Table 68: ID 6 to 7
Register
address
Bit
Type
Label
Default
Description
R32
ID_6_7
3:0
R/W
0000
RESERVED
7:4
R/W
LDO7_STEP
0000
Not controlled by power sequencer
Table 69: ID 8 to 9
Register
address
Bit
Type
Label
Default
Description
R33
ID_8_9
3:0
R/W
0000
RESERVED
7:4
R/W
LDO9_STEP
0000
Not controlled by power sequencer
Table 70: ID 10 to 11
Register
address
Bit
Type
Label
Default
Description
R34
ID_10_11
3:0
R/W
LDO10_STEP
0000
Not controlled by power sequencer
7:4
R/W
PD_DIS_STEP
0101
Power sequencer time slot 5



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