DA9021 datasheet(70/142 Pages) DIALOG

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DA9021/22

System PMIC with high efficiency USB power manager

Datasheet

Revision 2.5

17-Feb-2017

CFR0011-120-00 Rev 5

70 of 142

address

Bit

Type

Label

Default

Description

R/W

PWR1_EN

Note 3

Target status of power domain

POWER1:

state of GPI10 (OTP default ignored) or

configuration from OTP/PM interface

(depended on setting at GPIO_10_PIN)

R/W

PM_I_V

nONKEY, nSHUTDOWN, SYS_EN,

PWR_EN, PWR1_EN are supplied from:

0: VDDCORE

1: VDD_IO

R/W

PM_O_TYPE

nRESET, nIRQ output are:

0: Push-pull

1: Open drain

R/W

GPI_V

GPIs (not configured as PM control

inputs) are supplied from:

0: VDDCORE

1: VDD_IO

Note 1

SYS_EN hardware control can be configured as high or low active via GPIO_8_TYPE

Note 2

PWR_EN hardware control can be configured as high or low active via GPIO_9_TYPE

Note 3

PWR1_EN hardware control can be configured as high or low active via GPIO_10_TYPE

Table 53: CONTROL_B

address

Bit

Type

Label

Default

Description

R15

CONTROL_B

R/W

BUCK_MERGE

Has to be set if the outputs of

BUCKCORE and BUCKPRO are

merged towards a single coil; the control

from BUCKPRO registers is disabled

R/W

ACT_DIODE

Battery provides power

0: through internal active diode path

(mandatory, if no external FET

connected!)

1: through internal active diode and

external power FET

R/W

AUTO_BOOT

0: Start-up of power sequencer after

progressing from RESET mode requires

a valid wakeup event

1: PMIC automatically starts power

sequencer after progressing from

RESET mode

R/W

OTPREAD_EN

0: OTP read after POWERDOWN mode

disabled

1: Power supplies are configured with

OTP values when leaving

POWERDOWN mode

R/W

WRITE_MODE

2-wire multiple write mode (setting used

for both 2-wire interfaces)

0: Page Write mode

1: Repeated Write mode

R/W

DEEP_SLEEP

If set to ‘1’ DA9021/22 goes to deep

sleep mode (sequencer stops at pointer

DA9021 Datasheet(PDF) 70 Page - Dialog Semiconductor

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