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DA9021 Datasheet(PDF) 75 Page - Dialog Semiconductor

Part # DA9021
Description  System PMIC with high efficiency USB power manager
PDF  142 Pages
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Manufacturer  DIALOG [Dialog Semiconductor]
Direct Link  http://www.dialog-semiconductor.com/
Logo DIALOG - Dialog Semiconductor

DA9021 Datasheet(HTML) 75 Page - Dialog Semiconductor

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DA9021/22
System PMIC with high efficiency USB power manager
Datasheet
Revision 2.5
17-Feb-2017
CFR0011-120-00 Rev 5
75 of 142
© 2017 Dialog Semiconductor
15 GPIO Extender
The DA9021/22 includes a GPIO extender that offers VDDOUT-tolerant (5.5 V max) general purpose
input/output pins; each controlled by registers from the host.
NOTE
The input voltage has to be lower than the VDD_IO level
The GPIO ports are pin-shared with ports from GP-ADC, HS-2-wire interface and signals from the
power manager and can be individually assigned. Configuration settings and events from several
GPIx ports are shared with alternative features. If, for example, ADCIN5 was selected overriding the
configured thresholds this will trigger a GPI1 event that generates a maskable GPI1 interrupt. The
GPI active HIGHLOW setting from GPIOx_TYPE register and the selection of supply rail (and pull-up
resistor) is also valid for the alternative port features selected via GPIOx_PIN (for example SYS_EN,
PWR_EN and PWR1_EN). The same applies to GPIOx_MODE to enable triggering a wakeup event
(ADCIN4, ADCIN5, SYS_EN, PWR_EN, PWR1_EN, HS-2-wire interface) for the alternative features.
In ACTIVE and POWERDOWN modes the GPIO extender can continuously monitor the level of ports
that are selected as general purpose inputs. GPIs are supplied from the internal rail VDDCORE or
VDD_IO and can be configured to trigger events in active high or active low mode. The input signals
can be debounced or directly change the state of the assigned status register GPIx to high or low.
Whenever the status has changed to its configured active state (edge sensitive) the assigned event
register is set and the nIRQ signal is asserted (unless this nIRQ is masked inside the nIRQMASK
register).
GPI0 13 will generate a system wakeup if debouncing is enabled. In debouncing off mode GPI 12
enables/disables LDO9, the minimum enable time is 100 µs. Events on GPI10 can be used to control
the progress of the power sequencer. Processing ID WAIT_STEP will cause the sequencer to wait
until GPI 10 changes into active state.
If defined as an output the GPO can be configured as open-drain or push-pull. The supply rail is
VDD_IO. When selecting VDD_IO in open-drain mode, there is an internal pull-up resistor against
this rail, otherwise an external pull-up resistor towards the target voltage level is required. The output
state will be assigned as configured by the GPIO register bit GPIOx_MODE.
GPO 10 is a high power GPO port, where the maximum sink current is rated to be 15 mA and the
maximum source current is 4 mA. This enables driving LEDs with optional RTC timer controlled
flashing.
GPO 14 and 15 are high power GPO ports able to sink up to 30 mA and include an optional PWM
control. The PWM control can also be made to dim the brightness between its current value and a
new value at a rate of 32 ms per step.



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