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AD9174 Datasheet(PDF) 131 Page - Analog Devices |
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AD9174 Datasheet(HTML) 131 Page - Analog Devices |
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131 / 164 page ![]() Data Sheet AD9174 Rev. A | Page 131 of 164 Addr. Name Bits Bit Name Settings Description Reset Access 0x46F UNEXPECTED_ KCHAR 7 UEK7 Unexpected K character errors status, Lane 7. This control is paged by the LINK_PAGE control in Register 0x300. 0x0 R 0 Error count < ETH[7:0] value. 1 Error count ≥ ETH[7:0] value. 6 UEK6 Unexpected K character errors status, Lane 6. This control is paged by the LINK_PAGE control in Register 0x300. 0x0 R 0 Error count < ETH[7:0] value. 1 Error count ≥ ETH[7:0] value. 5 UEK5 Unexpected K character errors status, Lane 5. This control is paged by the LINK_PAGE control in Register 0x300. 0x0 R 0 Error count < ETH[7:0] value. 1 Error count ≥ ETH[7:0] value. 4 UEK4 Unexpected K character errors status, Lane 4. This control is paged by the LINK_PAGE control in Register 0x300. 0x0 R 0 Error count < ETH[7:0] value. 1 Error count ≥ ETH[7:0] value. 3 UEK3 Unexpected K character errors status, Lane 3. This control is paged by the LINK_PAGE control in Register 0x300. 0x0 R 0 Error count < ETH[7:0] value. 1 Error count ≥ ETH[7:0] value. 2 UEK2 Unexpected K character errors status, Lane 2. This control is paged by the LINK_PAGE control in Register 0x300. 0x0 R 0 Error count < ETH[7:0] value. 1 Error count ≥ ETH[7:0] value. 1 UEK1 Unexpected K character errors status, Lane 1. This control is paged by the LINK_PAGE control in Register 0x300. 0x0 R 0 Error count < ETH[7:0] value. 1 Error count ≥ ETH[7:0] value. 0 UEK0 Unexpected K character errors status, Lane 0. This control is paged by the LINK_PAGE control in Register 0x300. 0x0 R 0 Error count < ETH[7:0] value. 1 Error count ≥ ETH[7:0] value. 0x470 CODE_GRP_SYNC 7 CGS7 Code group synchronization status for Lane 7. This control is paged by the LINK_PAGE control in Register 0x300. 0x0 R 0 Synchronization lost. 1 Synchronization achieved. 6 CGS6 Code group synchronization status for Lane 6. This control is paged by the LINK_PAGE control in Register 0x300. 0x0 R 0 Synchronization lost. 1 Synchronization achieved. 5 CGS5 Code group synchronization status for Lane 5. This control is paged by the LINK_PAGE control in Register 0x300. 0x0 R 0 Synchronization lost. 1 Synchronization achieved. |
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