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AD9174 Datasheet(PDF) 129 Page - Analog Devices

Part # AD9174
Description  Dual, 16-Bit, 12.6 GSPS RF DAC and Direct Digital Synthesizer
PDF  164 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9174 Datasheet(HTML) 129 Page - Analog Devices

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Data Sheet
AD9174
Rev. A | Page 129 of 164
Addr.
Name
Bits
Bit Name
Settings
Description
Reset
Access
5
ILD5
Interlane deskew status for Lane 5. This
control is paged by the LINK_PAGE control
in Register 0x300.
0x0
R
0
Deskew failed.
1
Deskew achieved.
4
ILD4
Interlane deskew status for Lane 4. This
control is paged by the LINK_PAGE control
in Register 0x300.
0x0
R
0
Deskew failed.
1
Deskew achieved.
3
ILD3
Interlane deskew status for Lane 3. This
control is paged by the LINK_PAGE control
in Register 0x300.
0x0
R
0
Deskew failed.
1
Deskew achieved.
2
ILD2
Interlane deskew status for Lane 2. This
control is paged by the LINK_PAGE control
in Register 0x300.
0x0
R
0
Deskew failed.
1
Deskew achieved.
1
ILD1
Interlane deskew status for Lane 1. This
control is paged by the LINK_PAGE control
in Register 0x300.
0x0
R
0
Deskew failed.
1
Deskew achieved.
0
ILD0
Interlane deskew status for Lane 0. This
control is paged by the LINK_PAGE control
in Register 0x300.
0x0
R
0
Deskew failed.
1
Deskew achieved.
0x46D
BAD_DISPARITY
7
BDE7
Bad disparity errors status for Lane 7. This
control is paged by the LINK_PAGE control
in Register 0x300.
0x0
R
0
Error count < error threshold (ETH)[7:0] value.
1
Error count ≥ ETH[7:0] value.
6
BDE6
Bad disparity errors status for Lane 6. This
control is paged by the LINK_PAGE control
in Register 0x300.
0x0
R
0
Error count < ETH[7:0] value.
1
Error count ≥ ETH[7:0] value.
5
BDE5
Bad disparity errors status for Lane 5. This
control is paged by the LINK_PAGE control
in Register 0x300.
0x0
R
0
Error count < ETH[7:0] value.
1
Error count ≥ ETH[7:0] value.
4
BDE4
Bad disparity errors status for Lane 4. This
control is paged by the LINK_PAGE control
in Register 0x300.
0x0
R
0
Error count < ETH[7:0] value.
1
Error count ≥ ETH[7:0] value.
3
BDE3
Bad disparity errors status for Lane 3. This
control is paged by the LINK_PAGE control
in Register 0x300.
0x0
R
0
Error count < ETH[7:0] value.
1
Error count ≥ ETH[7:0] value.



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