PCI1031 datasheet(71/100 Pages) TI

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PCI1031

PCI-TO-PC CARD16 CONTROLLER UNIT

SCPS008B – FEBRUARY 1996 – REVISED DECEMBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

Table 34. ExCA Memory Window Offset-Address High-Byte Register (Index 15h, 1Dh, 25h, 2Dh, 35h)

BIT

TYPE

FUNCTION

R/W

Write protect. Bit 7 specifies whether write operations to this memory window are enabled. Bit 7 is encoded as:

0 = Write operations are allowed (default).

1 = Write operations are not allowed.

R/W

REG. Bit 6 specifies whether this memory window is mapped to card attribute or common memory. Bit 6 is encoded as:

0 = Memory window is mapped to common memory (default).

1 = Memory window is mapped to attribute memory.

5–0

R/W

Offset-address high-byte. Bits 5–0 represent the upper address bits A25–A20 of the memory window offset address.

ExCA I/O window 0–1 offset-address low-byte register (index 36h, 38h)

ExCA I/O window 0 offset-address low byte

Offset:

CardBus socket address + 836h; Card A ExCA offset 36h

Card B ExCA offset 76h

ExCA I/O window 1 offset-address low byte

Offset:

CardBus socket address + 838h; Card A ExCA offset 38h

Card B ExCA offset 78h

Type:

Read/write

Default:

00h

Size:

One byte

Description: These registers contain the low byte of the I/O window offset address for I/O windows 0 and 1.

Bit 0 is always 0.

ExCA I/O window 0–1 offset-address high-byte register (index 37h, 39h)

ExCA I/O window 0 offset-address high byte

Offset:

CardBus socket address + 837h; Card A ExCA offset 37h

Card B ExCA offset 77h

ExCA I/O window 1 offset-address high byte

Offset:

CardBus socket address + 839h; Card A ExCA offset 39h

Card B ExCA offset 79h

Type:

Read/write

Default:

00h

Size:

One byte

Description: These registers contain the high byte of the ExCA I/O window offset address for ExCA I/O

windows 0 and 1.

PCI1031 Datasheet(PDF) 71 Page - Texas Instruments

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