PCI1031 datasheet(25/100 Pages) TI

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PCI1031

PCI-TO-PC CARD16 CONTROLLER UNIT

SCPS008B – FEBRUARY 1996 – REVISED DECEMBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

ISA IRQ interrupts (continued)

Set bits 2–1 of PCI configuration register 92h (function 0) to 01b for interrupt mode selection.

Write to the upper four bits of ExCA register 05h/45h/805h for desired CSC routing for each socket (note

the restrictions placed on interrupt routing with ISA IRQ signaling; only ten IRQs are valid in this mode).

If a PC Card is installed in the socket and requires functional interrupts, write to the lower nibble of ExCA

interrupt routing with ISA IRQ signaling).

Using Table 9, write to the appropriate mask register bits to enable interrupt generation for desired events.

Upon card-removal events, host software should unroute any functional interrupts that were set for that

socket.

Upon card-insertion events, host software should reconfigure the mask and routing registers to support the

new card requirements.

PCI interrupts

NOTE:

PCI interrupts can be used with ISA interrupts. All unused INTA and INTB lines should be pulled

high by a 43-k

Ω resistor.

The PCI1031 also supports interrupt signaling compliant with the PCI local bus specification. Consistent with

this specification, the PCI1031 can use one PCI interrupt for each of its functions: INTA is used for PC Card

socket A interrupts, and INTB is used for socket B. These pins are on the PCI1031 at pins 154 and 155 and are

dual-function pins with the ISA-mode interrupts IRQ3 and IRQ4. When the PCI1031 is configured for PCI

interrupt signaling, these pins behave as open-drain PCI interrupts. Systems that prefer a single interrupt line

from the PCI1031 can connect these two interrupt terminals together.

PCI configuration register offset 91h must be written in order to route CSC and functional interrupts from each

socket. The step-by-step series of events for host software to successfully configure the PCI1031 for PCI

signaling follows. These steps assume that the system has powered up and RSTIN is high (deasserted). In

cases where only selected bits of a register are to be modified, host software must leave the remaining register

bits unchanged by reading the current contents of the register first, modifying the desired bits, then writing the

new value back to the register.

Set bit 5 of PCI configuration register 91h (function 0) to a value of 1 (enabled).

Set bit 3 of PCI configuration register 91h (functions 0 and 1 separately) to route CSC interrupts to INTA

(for socket A) or INTB (for socket B).

If a PC Card is installed in the socket and requires functional interrupts, write to bit 4 of the PCI Card control

(for socket B).

Using Table 8, write to the appropriate mask register bits to enable interrupt generation for desired events.

Upon card-removal events, host software should disable any functional interrupts generation.

Upon card insertion events, host software should reconfigure the mask and routing registers to support the

new card requirements.

PCI1031 Datasheet(PDF) 25 Page - Texas Instruments

PCI1031 Datasheet(HTML) 25 Page - Texas Instruments

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