DA6021 datasheet(158/225 Pages) RENESAS

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DA6021

HIGHLY INTEGRATED POWER MANAGEMENT IC FOR

INTEL® ATOM™ Z3000 PROCESSOR

Company Confidential

Data Sheet

Version 3.A - Final

31-Jan-14

158 of 224

www.dialog-semiconductor.com

SVTM Block Diagram

16.2

Figure 66: SVTM Block Diagram

Each specific implementation will connect the SVTM output as they deem appropriate except the PROCHOT_B

and IRQ which must be connected to the SoC.

Functional Description

16.3

The SVTM will react on voltage comparators placed on the VSYS node and comparators related to the bandgap

module (this is related to temperature thresholds). In addition it will react to the measurements results from the

ADC according to the programmed values.

VSYS Input Trip Points for ADC Measurement

16.3.1

There are three configurable independent VSYS trip points:



VWARNA: Warning zone A trip point. Will assert the DISA signal and interrupts the SoC when the

level crosses below and above the trip point for longer than the programmed value.



VWARNB: Warning zone B trip point. Will assert the DISB signal and interrupts the SoC when the

level crosses below and above the trip point for longer than the programmed value.



VCRIT: Warning zone CRITICAL trip point. Will assert the DISCRIT signal and interrupts the SoC

when the level crosses below and above the trip point for longer than the programmed value.

All the settings can be programmed via the configuration registers. It is assumed that these thresholds are

programmed as VWARNA > VWARNB > VCRIT.

VSYS monitoring will only be executed while being in SoC_S0 state.

SVTM

DISA

DISCRIT

DISB

SoC

Subsystem A

Subsystem B

Subsystem C

ADC

PMIC

SYS0

BAT1

BAT0

SYS1

SYS2

VSYS

REF

Under &

over voltage

Overtemp &

Temp warning

DA6021 Datasheet(PDF) 158 Page - Renesas Technology Corp

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