TMS320F datasheet(68/389 Pages) TI

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Program-Address Generation

5-4

5.1.1

Program Counter (PC)

The program-address generation logic uses the 16-bit program counter (PC)

to address internal and external program memory. The PC holds the address

of the next instruction to be executed. Through the program address bus

(PAB), an instruction is fetched from that address in program memory and

loaded into the instruction register. When the instruction register is loaded, the

PC holds the next address.

The ’C24x can load the PC in a number of ways, to accommodate sequential

and nonsequential program flow. Table 5–2 shows what is loaded to the PC

according to the code operation performed.

Table 5–2. Address Loading to the Program Counter

Code Operation

Address Loaded to the PC

Sequential execution

The PC is loaded with PC + 1 if the current instruction has

one word or PC + 2 if the current instruction has two words.

Branch

The PC is loaded with the long immediate value directly fol-

lowing the branch instruction.

Subroutine call and

return

For a call, the address of the next instruction is pushed from

the PC onto the stack, and then the PC is loaded with the

long immediate value directly following the call instruction.

A return instruction pops the return address back into the PC

to return to the calling sequence of code.

Software or hardware

interrupt

The PC is loaded with the address of the appropriate inter-

rupt vector location. At this location is a branch instruction

that loads the PC with the address of the corresponding in-

terrupt service routine.

Computed GOTO

The content of the lower 16 bits of the accumulator is loaded

into the PC. Computed GOTO operations can be performed

using the BACC (branch to address in accumulator) or

CALA (call subroutine at location specified by the accumula-

tor) instructions.

5.1.2

Stack

The ’C24x has a 16-bit-wide, 8-level-deep hardware stack. The program-ad-

dress generation logic uses the stack for storing return addresses when a sub-

routine call or interrupt occurs. When an instruction forces the CPU into a sub-

routine or an interrupt forces the CPU into an interrupt service routine, the re-

turn address is loaded to the top of the stack automatically, without the need

for additional cycles. When the subroutine or interrupt service routine is com-

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