TMS320F datasheet(93/389 Pages) TI

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Indirect Addressing Mode

6-9

Addressing Modes

6.3

Indirect Addressing Mode

Eight auxiliary registers (AR0–AR7) provide flexible and powerful indirect

addressing. Any location in the 64K data memory space can be accessed

using a 16-bit address contained in an auxiliary register.

6.3.1

Current Auxiliary Register

To select a specific auxiliary register, load the 3-bit auxiliary register pointer

(ARP) of status register ST0 with a value from 0 to 7. The ARP can be loaded

as a primary operation by the MAR instruction or by the LST instruction. The

ARP can be loaded as a secondary operation by any instruction that supports

indirect addressing.

The register pointed to by the ARP is referred to as the

current auxiliary register

current AR. During the processing of an instruction, the content of the cur-

rent auxiliary register is used as the address at which the data-memory access

occurs. The ARAU passes this address to the data-read address bus (DRAB)

if the instruction requires a read from data memory, or it passes the address

to the data-write address bus (DWAB) if the instruction requires a write to data

memory. After the instruction uses the data value, the contents of the current

auxiliary register can be incremented or decremented by the ARAU, which im-

plements unsigned 16-bit arithmetic.

Normally, the ARAU performs its arithmetic operations in the decode phase of

the pipeline (when the instruction specifying the operations is being decoded).

This allows the address to be generated before the decode phase of the next

instruction. There is an exception to this rule: during processing of the NORM

instruction, the auxiliary register and/or ARP modification is done during the

execute phase of the pipeline. For information on the pipeline operation, see

Chapter 5, Section 5.2,

Pipeline Operation, on page 5-7.

6.3.2

Indirect Addressing Options

The ’C24x provides four types of indirect addressing options:

- No increment or decrement. The instruction uses the content of the cur-

rent auxiliary register as the data memory address but neither increments

nor decrements the content of the current auxiliary register.

- Increment or decrement by 1. The instruction uses the content of the

current auxiliary register as the data memory address and then incre-

ments or decrements the content of the current auxiliary register by one.

- Increment or decrement by an index amount. The value in AR0 is the

index amount. The instruction uses the content of the current auxiliary reg-

ister as the data memory address and then increments or decrements the

content of the current auxiliary register by the index amount.

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