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TMS320F Datasheet(PDF) 24 Page - Texas Instruments |
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TMS320F Datasheet(HTML) 24 Page - Texas Instruments |
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24 / 389 page ![]() 2-1 Architectural Overview Architectural Overview This chapter provides an overview of the architectural structure and compo- nents of the ’C24x DSP CPU. The ’C24x DSP uses an advanced, modified Harvard architecture that maximizes processing power by maintaining sepa- rate bus structures for program memory and data memory. Topic Page 2.1 Architecture Summary 2-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 ’C24x CPU Internal Bus Structure 2-4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3 Memory 2-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4 Central Processing Unit 2-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 Program Control 2-10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6 Serial-Scan Emulation 2-10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Chapter 2 |
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