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Table 6-35. Boost Phase selection from i2c target

address (continued)

BOOST_PHASE_FROM_ADDR

ESS_PIN

Status

Enabled(default)

Table 6-36. Boost Phase manual selection (when

BOOST_PHASE_FORM_ADDRESS_PIN = 0)

BOOST_PHASE[1:0]

Phase Delay

Phase shift is 0ns (default)

Phase shift is 65ns

(~90° for max clock)

Phase shift is 130ns

(~180° for max clock)

Phase shift is 195ns

(~270° for max clock)

6.4.5 Supply Voltage Monitors

TAS2120 has integrated SAR ADC to monitor the supply voltage pins VBAT or VBAT_SNS and PVDD. The

sensed voltages are used for internal device features, protections and can also be streamed out over digital data

bus or read through i2c registers.

The battery voltage can be sensed through either VBAT or VBAT_SNS pins based on the register

SEL_VBAT_MODE[1:0]

Table 6-37. Battery mode selection

SEL_VBAT_MODE[1:0]

Configuration

00 (default)

Voltage monitor on VBAT pin. 1S

mode of operation

Voltage monitor on VBAT_SNS

pin. 1S mode of operation

Voltage monitor on VBAT_SNS

pin. 2S mode of operation

Reserved

The monitor ADC samples the VBAT pin at higher rate compared to PVDD pin voltage. This sampling speed

can be swapped to prioritize PVDD pin sampling rate over VBAT, for example in case of external PVDD mode of

operation.

Table 6-38. Supply monitor sampling rate

SUPPLY_SAMPLING_RATE

Configuration

0(default)

VBAT Sampling rate is higher

than PVDD

PVDD Sampling rate is higher

than VBAT

The VBAT and PVDD monitored voltages are stored in the register VBAT_CNV and PVDD_CNV registers and

can be read using i2c commands.

The supply monitors are also used for voltage protection like VBAT under voltage, PVDD over voltage and

under voltage and VBAT2S under voltage. The voltage protection features monitors the supply voltages, and

shuts down the device when the voltage crosses the protection threshold levels. The device also sets the

corresponding fault register and can generate an interrupt on IRQZ pin based on configured interrupt Mask

MODE[1:0] register bits.

TAS2120

SLASFC6 – AUGUST 2024

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