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TAS2120 Datasheet(PDF) 41 Page - Texas Instruments |
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TAS2120 Datasheet(HTML) 41 Page - Texas Instruments |
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41 / 63 page  The controller device drives a start condition followed by the 7-bit target address and the read/write (R/W) bit to open communication with another device and then waits for an acknowledgment condition. The target device holds SDA low during the acknowledge clock period to indicate acknowledgment. When this occurs, the controller device transmits the next byte of the sequence. Each target device is addressed by a unique 7-bit target address plus the R/W bit (1 byte). All compatible devices share the same signals via a bidirectional bus using a wired-AND connection. www.ti.com TAS2120 SLASFC6 – AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 41 Product Folder Links: TAS2120 |
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