TAS2120 datasheet(5/63 Pages) TI

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5.4 Thermal Information

THERMAL METRIC(1)

Standard JEDEC(2)

UNIT

HR-QFN

26 PINS

RθJA

Junction-to-ambient thermal resistance

51.5

℃/W

RθJC(top)

Junction-to-case (top) thermal resistance

28.5

℃/W

RθJB

Junction-to-board thermal resistance

15.3

℃/W

ΨJT

Junction-to-top characterization parameter

0.9

℃/W

ΨJB

Junction-to-board characterization parameter

15.2

℃/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

n/a

℃/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

(2)

JEDEC Standard 4 Layer PCB

5.5 Electrical Characteristics

TA = 25 °C, VBAT = 3.6 V, VBAT2S = 7.2V (2S mode enabled), PVDD = 12 V ( External PVDD mode enabled), VDD = 1.8

V, IOVDD = 1.8V RL = 8Ω + 33µH, LBOOST = 1µH, fin = 1 kHz, fs = 48 kHz, Gain = 21dBV, BST_ILIM (1S battery) = 5.1A,

BST_ILIM (2S battery, HW mode)=4.1A, BST_ILIM (2S battery, I2C mode)=5.1A, SDZ = 1, Noise gate disabled, Measured

filter free with an Audio Precision using 22 Hz to 20 kHz un-weighted bandwidth (unless otherwise noted).

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

AMPLIFIER PERFORMANCE - 15V INTERNAL BOOST 1S Mode

POUT

Maximum Continuous Output Power - 1%

THDN

RL = 8 Ω + 33 µH

6.6

RL = 8 Ω + 33 µH, VBAT = 4.4V

8.2

RL = 4 Ω + 33 µH

6.6

RL = 4 Ω + 33 µH, VBAT = 4.4V

8.2

POUT

Maximum Continuous Output Power - 1%

THDN

RL = 8 Ω + 33 µH, HW pin control mode

6.6

RL = 4 Ω + 33 µH, HW pin control mode

6.6

POUT

Maximum Continuous Output Power -

10% THDN

RL = 8 Ω + 33 µH, VBAT = 4.4V

9.5

RL = 4 Ω + 33 µH, VBAT = 4.4V

9.5

ηSYSTEM_

0.5W

System Efficiency at POUT = 0.5W

RL = 8 Ω + 33 µH

84.8

RL = 8 Ω + 33 µH, VBAT = 4.4V

ηSYSTEM_

System Efficiency at POUT = 1.0W

RL = 8 Ω + 33 µH

86.8

RL = 8 Ω + 33 µH, VBAT = 4.4V

ηSYSTEM_

System Efficiency at POUT = 1.0W

RL = 8 Ω + 33 µH, HW pin control mode

86.8

RL = 4 Ω + 33 µH, HW pin control mode

86.8

ηSYSTEM_

MAX_POUT

System Efficiency at 1% THD+N power

Level

RL = 8 Ω + 33 µH

81.2

ηSYSTEM_

MAX_POUT

System Efficiency at 1% THD+N power

Level

RL = 8 Ω + 33 µH, HW pin control mode

RL = 4 Ω + 33 µH, HW pin control mode

77.4

Idle channel Noise

A-Weighted, Gain = 6dBV (Receiver

Mode), DAC-Running

4.2

µV

A-Weighted, Gain = 21dBV (Speaker

Mode), DAC-Running

14.4

µV

DNR

Dynamic Range

A-Weighted, -60 dBFS Method, RL = 8 Ω

+ 33 µH, Gain = 6dBV (Receiver Mode)

113.7

A-Weighted, -60 dBFS Method, RL = 8 Ω

+ 33 µH, Gain = 21dBV (Speaker Mode)

117.2

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TAS2120

SLASFC6 – AUGUST 2024

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