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PM7346 Datasheet(PDF) 25 Page - PMC-Sierra, Inc |
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PM7346 Datasheet(HTML) 25 Page - PMC-Sierra, Inc |
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25 / 419 page ![]() PM7346 S/UNI-QJET DATASHEET PMC-960835 ISSUE 6 SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3 PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 4 • Provides programmable pseudo-random test-sequence detection (up to 232- 1 bit length patterns conforming to ITU-T O.151 standards) and analysis features. The transmitter section: • Provides frame insertion for the M23 or C-bit parity DS3 applications, alarm insertion, and diagnostic features. In addition, far end alarm channel codes may be inserted, and an integral HDLC transmitter is provided to insert the path maintenance data link. • Provides frame insertion for the G.751 or G.832 E3 applications, alarm insertion, and diagnostic features. In addition, for G.832, the Trail Trace is inserted, and an integral HDLC transmitter is provided to insert either the Network Requirement or the General Purpose data link. • Provides frame insertion for G.704 6.312 Mbit/s J2 applications, alarm insertion, and diagnostic features. An integral HDLC transmitter is provided to insert the path maintenance data link. • Provides frame insertion and path overhead insertion for DS1, DS3, E1 or E3 based PLCP formats. In addition, alarm insertion and diagnostic features are provided. • Provides a 50 MHz 8-bit wide or 16-bit wide Utopia FIFO buffer in the transmit path with parity support and multi-PHY (Level 2) control signals. • Provides optional ATM cell scrambling, header scrambling (for use with PPP packets), HCS generation/insertion, programmable idle cell insertion, diagnostics features and accumulates transmitted cells read from the FIFO. • Provides a four cell FIFO for rate decoupling between the line and a higher layer processing entity. FIFO latency may be reduced by changing the number of operational cell FIFOs. • Provides a transmit HDLC controller with a 128-byte FIFO. • Provides an 8 kHz reference input for locking the transmit PLCP frame rate to an externally applied frame reference. • Provides programmable pseudo-random test sequence generation (up to 232-1 bit length sequences conforming to ITU-T O.151 standards). |
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