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PM7346 Datasheet(PDF) 83 Page - PMC-Sierra, Inc

Part # PM7346
Description  SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3
PDF  419 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7346 Datasheet(HTML) 83 Page - PMC-Sierra, Inc

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PM7346 S/UNI-QJET
DATASHEET
PMC-960835
ISSUE 6
SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 62
m-bits, and Remote Loss of Frame (a-bit) are detected by the J2-FRMR. In
addition to providing indication signals of these states, the J2-FRMR will
optionally generate an interrupt when any of these status signals changes.
J2 LOS is declared when no marks have been received for one of 15, 31, 63, or
255 consecutive bit periods. J2 LOS is cleared when either 15, 31, 63, or 255
consecutive bit periods have passed without an excessive zeros (8 or more
consecutive zeros) detection as required by ITU-T G.775.
J2 LOF is declared when 7 or more consecutive multiframes with errored framing
patterns are received. The J2 LOF is cleared when 3 or more consecutive
multiframes with correct framing patterns are received. A framing algorithm
which takes into account the CRC calculation is also available. The framing
algorithms are described in the following text.
J2 Physical Layer AIS is declared when 2 or less zeros are detected in a
sequence of 3156 bits. It is cleared when 3 or more zeros is detected in a
sequence of 3156 bits as required by ITU-T G.775.
J2 Payload AIS is detected when the incoming J2 payload has 2 or less zeros in
a sequence of 3072 bits. It is cleared when 3 or more zeros are detected in a
sequence of 3072 bits.
The J2-FRMR may be forced to re-frame by microprocessor control. Similarly,
the microprocessor may disable the J2-FRMR from reframing due to framing bit
errors.
The J2-FRMR may be configured, and all sources of interrupts may be masked
or acknowledged, via internal registers. These internal registers are accessed
via a generic microprocessor bus.
9.3.1 J2 Frame Find Algorithms
The J2-FRMR searches for frame alignment using one of two algorithms, as
selected by the CRC_REFR bit in the J2-FRMR Configuration Register.
When the CRC_REFR bit is set to logic 0, the J2-FRMR uses only the frame
alignment sequence to find frame, searching for three consecutive correct frame
alignment sequences. The frame find block searches for the entire 9-bit
sequence (spread over two multiframes) at the same time, greatly reducing the
time required to find frame alignment. The framing process with CRC-REFR
cleared is illustrated in Figure 8.



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