PM7346 datasheet(252/419 Pages) PMC

252 / 419 page

PM7346 S/UNI-QJET

DATASHEET

PMC-960835

ISSUE 6

SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3

PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 231

Bit

Type

Function

Default

Bit 7

R/W

GFC[3]

Bit 6

R/W

GFC[2]

Bit 5

R/W

GFC[1]

Bit 4

R/W

GFC[0]

Bit 3

R/W

PTI[3]

Bit 2

R/W

PTI[2]

Bit 1

R/W

PTI[1]

Bit 0

R/W

CLP

GFC[3:0]:

The GFC[3:0] bits contain the pattern to match in the first, second, third, and

fourth bits of the first octet of the 53-octet cell, in conjunction with the Idle Cell

Header Mask Register. The IDLEPASS bit in the Configuration 2 Register

must be set to logic zero to enable dropping of cells matching this pattern.

Note that an all-zeros pattern must be present in the VPI and VCI fields of the

idle or unassigned cell.

PTI[2:0]:

The PTI[2:0] bits contain the pattern to match in the fifth, sixth, and seventh

bits of the fourth octet of the 53-octet cell, in conjunction with the Idle Cell

Header Mask Register. The IDLEPASS bit in the Configuration 2 Register

must be set to logic zero to enable dropping of cells matching this pattern.

CLP:

The CLP bit contains the pattern to match in the eighth bit of the fourth octet

of the 53-octet cell, in conjunction with the Match Header Mask Register. The

IDLEPASS bit in the Configuration 2 Register must be set to logic zero to

enable dropping of cells matching this pattern.

PM7346 Datasheet(PDF) 252 Page - PMC-Sierra, Inc

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