ADPL74101 datasheet(37/49 Pages) AD

37 / 49 page

Data Sheet

ADPL74101

analog.com

Rev. 0

37 of 49

Efficiency Considerations

The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%.

Analyzing individual losses is useful for determining what is limiting the efficiency and which change produces the

most improvement. The percent efficiency can be expressed by Equation 25, as follows:

%Efficiency = 100% – (L1 + L2 + L3 + ...)

(25)

where L1, L2, L3, and so on, are the individual losses as a percentage of input power.

Although all dissipative elements in the circuit produce losses, four main sources usually account for most of the

losses in ADPL74101 circuits: IC VIN current, INTVCC regulator current, I2R losses, and topside FET transition losses.

The VIN current is the DC supply current given in Table 1 (Electrical Characteristics table), excluding the FET driver and

control currents. Other than at light loads in Burst Mode operation, VIN current typically results in a small (<0.1%)

loss.

The INTVCC current is the sum of the FET driver and control currents. The FET driver current results from switching

the gate capacitance of the power FETs. Each time a FET gate switches from low to high and back to low again, a

packet of charge (dQ) moves from INTVCC to GND. The resulting dQ/time duration (dt) is a current out of INTVCC that

is typically much larger than the control circuit current. In continuous mode, gate charge current (IGATECHG) = SW

frequency (fSW)(QT + QB), where QT and QB are the gate charges of the top and bottom FETs.

Supplying INTVCC from an output-derived source through EXTVCC scales the VIN current required for the driver and

control circuits by a factor of VOUT/(VIN × efficiency). For example, in a 20V to 5V application, 10 mA of INTVCC current

results in approximately 2.5mA of VIN current. This result reduces the mid-current loss from 10% or more (if the driver

was powered directly from VIN) to only a few percent.

I2R losses are predicted from the DC resistances of the input fuse (if used), FET, inductor, current sense resistor, and

input and output capacitor ESR. In continuous mode, the average output current flows through L and RSENSE, but is

chopped between the top and bottom FETs. If the two FETs have approximately the same RDS(ON), the resistance of

one FET can be summed with the resistances of L, RSENSE, and ESR to obtain the I2R losses.

For example, if each RDS(ON) = 30mΩ, RL = 50mΩ, RSENSE = 10mΩ, and ESR = 40mΩ (the sum of both input and output

capacitance losses), the total resistance is 130mΩ. The resulting losses range from 3% to 13% as the output current

increases from 1A to 5A for a 5V output, or a 4% to 20% loss for a 3.3V output. Efficiency varies as the inverse square

of VOUT for the same external components and output power level. The combined effects of increasingly lower output

voltages and higher currents required by high-performance digital systems are not doubling, but quadrupling the

importance of loss terms in the switching regulator system.

Transition losses apply only to the top FETs and become significant only when operating at higher input voltages

(typically 15V or greater). Transition losses can be estimated using Equation 26, as follows:

TRANSITION LOSS = (1.7)(VIN)

2 × I

L(MAX)

× CRSS × fSW

(26)

where CRSS is the reverse transfer capacitance.

Other hidden losses, such as copper trace and internal battery resistances, can account for an additional 5% to 10%

efficiency degradation in portable systems. It is important to include these system-level losses during the design

phase. The internal battery and fuse resistance losses can be minimized by ensuring that CIN has adequate charge

storage and a low ESR at the switching frequency. A 25W supply typically requires a minimum of 20μF to 40μF of

capacitance with a maximum ESR of 20mΩ to 50mΩ. Other losses, including inductor core losses, generally account

for less than 2% total additional loss.

ADPL74101 Datasheet(PDF) 37 Page - Analog Devices

ADPL74101 Datasheet(HTML) 37 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49

Datasheet Download

Link URL