ADPL74101 datasheet(13/49 Pages) AD

13 / 49 page

Data Sheet

ADPL74101

analog.com

Rev. 0

13 of 49

VFB

Error Amplifier Feedback Input. If VPRG is floating, VFB receives the remotely sensed

feedback voltage from an external resistive divider across the output. If VPRG is tied to

GND or INTVCC, VFB receives the remotely sensed output voltage directly.

SENSE+

The Positive Input to the Differential Current Comparator. The ITH pin voltage and

controlled offset between the SENSE− and SENSE+ pins, in conjunction with the current

sense resistor (RSENSE), set the current trip threshold.

SENSE-

The Negative Input to the Differential Current Comparator. The SENSE− pin supplies

current to the current comparator when SENSE– is greater than INTVCC. When the

SENSE– is 3.2V or greater, the pin supplies the majority of the sleep mode quiescent

current instead of VIN, further reducing the input-referred quiescent current.

24, 25

GND

Ground. Connect this pin to the PCB GND.

DRVSET

INTVCC Regulation Program Pin. DRVSET sets the regulation point for the INTVCC LDO

linear regulators. Connect DRVSET to GND to set INTVCC to 5V. Connect DRVSET to

INTVCC to set INTVCC to 5.5V. Program voltages between 4V and 5.5V by placing a

resistor (50kΩ to 110kΩ) between DRVSET and GND. The resistor and an internal 20µA

source current create a voltage used by the INTVCC LDO regulator to set the regulation

point.

DRVUV

DRVCC UVLO and EXTVCC Switchover Program Pin. DRVUV determines the INTVCC UVLO

and EXTVCC switchover rising and falling thresholds, as listed in Table 1 (Electrical

Characteristics table).

RUN

Run Control Input for the Controller. Forcing RUN below 1.08V disables controller

switching. Forcing RUN below 0.7V shuts down the ADPL74101, reducing quiescent

current to approximately 1µA. Tie the RUN pin to VIN for always-on operation.

GND (EPAD)

Ground (Exposed Pad). The exposed pad must be soldered to PCB GND for rated

electrical and thermal performance.

ADPL74101 Datasheet(PDF) 13 Page - Analog Devices