LAN9211 datasheet(19/146 Pages) SMSC

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High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX

Datasheet

SMSC

LAN9211

Revision 1.93 (11-27-07)

DATASHEET

Note 2.1

Please refer to the SMSC application note AN16.6 - “Migrating from LAN9215 to the

LAN9210/LAN9211” for additional details.

General Purpose

I/O data,

nLED1 (Speed

Indicator),

nLED2 (Link &

Activity Indicator),

nLED3 (Full-

Duplex

Indicator).

GPIO[2:0]/

nLED[3:1]

IS/O12/

OD12

General Purpose I/O data: These three

general-purpose signals are fully programmable

as either push-pull output, open-drain output or

input by writing the GPIO_CFG configuration

as GP LED connections.

GPIO signals are Schmitt-triggered inputs.

When configured as LED outputs these signals

are open-drain.

nLED1 (Speed Indicator). This signal is driven

low when the operating speed is 100Mbs,

during auto-negotiation and when the cable is

disconnected. This signal is driven high only

during 10Mbs operation.

nLED2 (Link & Activity Indicator). This signal

is driven low (LED on) when the LAN9211

detects a valid link. This signal is pulsed high

(LED off) for 80mS whenever transmit or

receive activity is detected. This signal is then

driven low again for a minimum of 80mS, after

which time it will repeat the process if TX or RX

activity is detected. Effectively, LED2 is

activated solid for a link. When transmit or

receive activity is sensed LED2 will flash as an

activity indicator.

nLED3 (Full-Duplex Indicator). This signal is

driven low when the link is operating in full-

duplex mode.

+3.3V I/O Power

VDD_IO

+3.3V I/O logic power supply pins

Common Ground

VSS

1 pad

Common Ground

+3.3V Analog

Power

VDD_A33

+3.3V analog power supply pins. See Note 2.1.

+1.8V Analog

Power

VDD_A18

+1.8V analog power supply pin. This pin must

be connected externally to VDD_CORE. See

Note 2.1.

Core Voltage

Decoupling

VDD_CORE

+1.8 V from internal core regulator. Both pins

must be connected together externally. Each

pin requires a 0.01uF decoupling capacitor. In

addition, pin 2 requires a bulk 10uF capacitor

(<2 Ohm ESR) in parallel. See Note 2.1.

Table 2.4 System and Power Signals (continued)

NAME

SYMBOL

BUFFER

TYPE

NUM

PINS

DESCRIPTION

LAN9211 Datasheet(PDF) 19 Page - SMSC Corporation

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