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RZ/G3E Datasheet(PDF) 3 Page - Renesas Technology Corp

Part # RZ/G3E
Description  RZ Family, RZ/G Series
PDF  112 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

RZ/G3E Datasheet(HTML) 3 Page - Renesas Technology Corp

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RZ/G3E Group
1. Overview
R01DS0477EJ0115 Rev.1.15
Page 3 of 112
Nov 28, 2025
1.
Overview
1.1
Outline of Specification
1.1.1
CPU
Item
Description
Application Processor
Cortex-A55
(CA55)
[Quad/Dual option]
● Arm Cortex-A55 Quad Core 1.8 GHz with 0.9 V, 1.1 GHz with 0.8 V
● L1 I-cache 32 Kbytes (with parity) and D-cache 32 Kbytes (with ECC) per core
● L2 cache: 0 Kbyte
● L3 cache: 1 Mbyte (with ECC)
● MMU supported
● Neon™ and FPU supported
● Cryptographic extension supported
● Armv8-A architecture
System Manager
Cortex-M33
(CM33)
● Arm Cortex-M33 Processor 200 MHz
● FPU supported
● DSP Extension supported
● Security Extension supported
● Armv8-M architecture
Debug Interface
● Arm® CoreSight® architecture
● JTAG and SWD interfaces supported
● ETF: Total of 60 Kbytes for program flow tracing
● JTAG disabling supported [option]
1.1.2
Boot
Item
Description
Boot
● Selectable boot from Arm Cortex-A55 or Arm Cortex-M33
● CA55 boot
– Boot Mode 0: Booting from eSD
– Boot Mode 1: Booting from eMMC 3.3 V
– Boot Mode 2: Booting from a serial flash memory connected to the xSPI bus space 3.3 V
– Boot Mode 3: Booting from SCIF download
– Boot Mode 4: Booting from USB download
– Boot Mode 5: Booting from eMMC 1.8 V
– Boot Mode 6: Booting from a serial flash memory connected to the xSPI bus space 1.8 V
● CM33 boot
– Boot Mode 2: Booting from a serial flash memory connected to the xSPI bus space 3.3 V
– Boot Mode 3: Booting from SCIF download
– Boot Mode 6: Booting from a serial flash memory connected to the xSPI bus space 1.8 V
1.1.3
NPU
Item
Description
Micro Neural network
Processing Unit
(NPU)
[option]
● Arm Ethos-U55 1.0 GHz
● 256MAC
● 0.5 TOPS



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