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RZ/G3E Datasheet(PDF) 48 Page - Renesas Technology Corp |
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RZ/G3E Datasheet(HTML) 48 Page - Renesas Technology Corp |
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48 / 112 page ![]() RZ/G3E Group 3. Electrical Characteristics R01DS0477EJ0115 Rev.1.15 Page 48 of 112 Nov 28, 2025 Item I/O Type Symbol Min. Typ. Max. Unit Condition Pull-up resistance 1.8/1.2-V switching I/O type*4 (1.2 V) RPU 15 — 160 kΩ — 1.8/1.2-V switching I/O type*4 (1.8 V) RPU 10 — 50 kΩ — 3.3/1.8-V switching I/O type 1*8 (1.8 V) 3.3/1.8-V switching I/O type 3*10 (1.8 V) 3.3/1.8-V switching I/O type 4*6 (1.8 V) RPU 10 — 50 kΩ — 3.3/1.8-V switching I/O type 1*8 (3.3 V) RPU 10 — 100 kΩ — 3.3/1.8-V switching I/O type 2*12 RPU 12 — 92 kΩ — Pull-down resistance 1.8/1.2-V switching I/O type*3 (1.2 V) RPD 15 — 160 kΩ — 1.8/1.2-V switching I/O type*3 (1.8 V) RPD 15 — 60 kΩ — 3.3/1.8-V switching I/O type 1*7 (1.8 V) 3.3/1.8-V switching I/O type 3*9 (1.8 V) 3.3/1.8-V switching I/O type 4*5 (1.8 V) RPD 10 — 50 kΩ — 3.3/1.8-V switching I/O type 1*7 (3.3 V) RPD 10 — 100 kΩ — 3.3/1.8-V switching I/O type 2*11 RPD 13 — 92 kΩ — Input capacitance — Cin — — 10 pF Note 1. Only for the QRESN and QRESNSEL pin Note 2. When the RIIC function is in use or the value of the PFC_SMT_mn register is 1 Note 3. Only for the P20 and P21 pins (when the value of the PFC_PUPD_mn register is 10b) Note 4. Only for the P20 and P21 pins (when the value of the PFC_PUPD_mn register is 11b) Note 5. Only for the QBYPASS, BSCANP, MD_BOOT0, MD_BOOT3, and BOOTSELCPU pins Note 6. Only for the MD_BOOT1, MD_BOOT2 and MD_CLKS pins Note 7. Only for the WDTUDFCA, WDTUDFCM, and SCIF_RXD, SCIF_TXD pins (when the value of the PFC_PUPD_mn register is 10b) Note 8. Only for the WDTUDFCA, WDTUDFCM, and SCIF_RXD, SCIF_TXD pins (when the value of the PFC_PUPD_mn register is 11b) Note 9. When the value of the PFC_PUPD_mn register is 10b Note 10. When the value of the PFC_PUPD_mn register is 11b Note 11. Only for the pins other than SD0CLK, SD0RSTN, SD0PWEN, and SD0IOVS (when the value of the PFC_PUPD_mn register is 10b) Note 12. Only for the pins other than SD0CLK, SD0RSTN, SD0PWEN, and SD0IOVS (when the value of the PFC_PUPD_mn register is 11b) Note 13. This type IO can be available both 3.3 V and 1.8 V buffers, but it is fixed at 1.8 V buffer. Note 14. Only for the pins other than SD0CLK, SD0CMD, SD0DAT0-SD0DAT7, SD0PWEN, SD0IOVS, and SD0RSTN (when the RIIC function is in use or the value of the PFC_SMT_mn register is 1) |
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