3886 datasheet(284/380 Pages) RENESAS

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3886 Group User’s Manual

APPLICATION

2-167

2.15 Flash memory

Also, execute the following processing before the CPU reprogramming mode is selected so that interrupts

will not occur during the CPU reprogramming mode.

• Set the interrupt disable flag (I) to “1”

In the CPU reprogramming mode, write to the watchdog timer control register (address 1E16) periodically

to prevent the generation of a reset by the underflow of the watchdog timer H.

In the program state (programming time: max. 9.5

µs), watchdog timer H and L are set to “FF16”, and the

count stop. The count is started again after the program state or the erase state is completed. Accordingly,

the write period of the watchdog timer control register is calculated except for the program time and erase

time.

When the interrupt request or reset occurs in the CPU reprogramming mode, the microcomputer enters the

following states;

(1) Interrupt

This may cause a program runaway because the flash memory that has an interrupt vector area cannot

be read.

(2) Underflow of watchdog timer H, reset

This may cause a microcomputer reset; the built-in flash memory control circuit and the flash memory

control register are reset.

Also, note that, when the interrupt or reset occurs during program/erase, error data may still exist after

reset release because the reprogramming of the flash memory has not been completed. In this case,

setting the proper program code to the flash memory in the parallel I/O mode or serial I/O mode is required.

2.15.7 Flash memory mode application examples

The control pin processing example on the system board in the serial I/O mode and the control example

in the CPU reprogramming mode are described below.

(1)

Control pin connection example on the system board in serial I/O mode

As shown in Figure 2.15.5, in the serial I/O mode, the built-in flash memory can be reprogrammed

with the microcomputer mounted on board. Connection examples of control pins (P37, P44, P46, P47,

CNVSS and RESET pin) in the serial I/O mode are described below.

Fig. 2.15.5 Reprogramming example of built-in flash memory in serial I/O mode

Master ROM

RS-232C Serial programmer

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