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32182 Datasheet(PDF) 145 Page - Renesas Technology Corp |
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32182 Datasheet(HTML) 145 Page - Renesas Technology Corp |
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145 / 755 page ![]() 6 6-10 INTERNAL MEMORY 32182 Group User’s Manual (Rev.1.0) 6.4 Registers Associated with the Internal Flash Memory Flash Control Register 3 (FCNT3) <Address: H’0080 01E4> 123456 b7 b0 FELEVEL 0 0 0 0 0 0 0 0 <After reset: H’00> b Bit Name Function R W 0–6 No function assigned. Fix to "0". 00 7 FELEVEL 0: Normal level R W Erase margin-up bit 1: Raise erase margin up Flash Control Register 3 (FCNT3) controls the depth of erase levels when erasing the internal flash memory with one of erase commands. The internal flash memory erase level can be deepened by setting the FELEVEL bit to "1". Flash Control Register 4 (FCNT4) <Address: H’0080 01E5> 9 1011121314 b15 b8 FRESET 0 0 0 0 0 0 0 0 <After reset: H’00> b Bit Name Function R W 8–14 No function assigned. Fix to "0". 00 15 FRESET 0: No operation R W Flash reset bit 1: Reset Flash Control Register 4 (FCNT4) controls initializing each status bit of Flash Status Register 2 (FSTAT2) or canceling a programming/erase operation. Setting the FRESET bit to "1" initializes each status bit of the FSTAT2 register or cancels a programming/erase operation. The FRESET bit is effective only when the FENTRY bit = "1". If the FENTRY bit = "0", the FRESET bit informa- tion is ignored. When programming or easing the internal flash memory, make sure the FRESET bit remains "0". An example for clearing each status of FSTAT2 during a programming/erase operation, and an example for forcibly terminating (canceling) a programming/erase operation due to time-out are shown below. |
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