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7480 Datasheet(PDF) 184 Page - Renesas Technology Corp |
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7480 Datasheet(HTML) 184 Page - Renesas Technology Corp |
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184 / 337 page ![]() 7480 Group and 7481 Group User's Manual 1-167 1.19 Power Saving Function HARDWARE Recovery from Stop Mode by Interrupt The stop mode is terminated and the XIN oscillation is resumed when an interrupt request is generated and its interrupt is acceptable in the stop mode. Next, the oscillator start-up stabilization time is generated by timer 1. After the oscillator start-up stabilization time elapses, internal clock φ is resumed and supplied to the CPU. The interrupt request used to terminate the stop mode is accepted and the interrupt service routine is executed. After the interrupt service routine is completed, the program is executed at the instruction following the STP instruction. Note: The state of timer 1 is affected by recovering from the stop mode. The interrupt sources used for recovery from the stop mode are as follows: • INT0, INT1 • CNTR0, CNTR1 • Serial I/O (only when external clock (or its 1/16) is selected as the synchronous clock) • Timer X and timer Y (only in event count mode) • Key inputs (in key-on wakeup) Figure 1.19.6 shows an operation example at recovery from the stop mode by the INT0 interrupt. Figure 1.19.6 Operation Example at Recovery from Stop Mode by INT0 Interrupt RL RL UF XIN FF16 0016 Operating Operating Operating Stop Operating CPU Peripheral device Stop (Note 2) Counting down Contents of timer 1 INT0 pin input INT0 interrupt request bit INT0 interrupt request accepted Undefined RL UF : Reload : Underflow • INT0 interrupt is used for recovery from stop mode (rising edge detected) Stop mode STP executed Stop mode is terminated by INT0 interupt Oscillation start-up stabilization time 2048 cycles of XIN pin input signal XIN pin : High-impedance state STP instruction execution cycle (Note 1) Notes 1: 2 cycles of internal clock 2: Timer operates in event count mode. Serial I/O operates when the external clock input (or its 1/16) is used as the synchronous clock. φ instruction |
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