7480 datasheet(185/337 Pages) RENESAS

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7480 Group and 7481 Group User's Manual

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1.19 Power Saving Function

HARDWARE

(2)

Transition to Stop Mode

The transition from the normal mode to the stop mode is described below.

Recovery from Stop Mode by Reset Input

Execute the STP instruction while the STP instruction is valid.

Recovery from Stop Mode by Accepting Interrupt Request

Execute the STP instruction while the STP instruction is valid after the following sequence is completed:

• Set the interrupt that is used to terminate the stop mode.

• Clear the timer 1 interrupt enable bit to ‘0’ (disabled).

• Clear the timer 1 stop control bit to ‘0’ (count operation).

For the setting of the valid/invalid of the STP instruction, refer to Section 1.19.4 Setting of Valid/

Invalid of STP and WIT Instructions.

1.19.3 Wait Mode

(1)

Operations in Wait Mode

State in Wait Mode

When the WIT instruction is valid, its execution causes the CPU to enter the wait mode. In this mode,

internal clock

φ stops, though f(XIN) continues oscillation. As a result, the CPU is halted but the

peripherals continue to operate.

For the operations in the wait mode, refer to Table 1.19.1 States of Microcomputer at Power

Saving Modes.

The wait mode is terminated by reset or accepting an interrupt request, and the CPU returns to the

normal mode.

The operation at recovery from the wait mode by reset or accepting an interrupt request is described

below.

Recovery from Wait Mode by Reset Input

By applying the LOW level to the RESET pin for 2

µs or more in the wait mode, the CPU enters

the reset state and is brought out of the wait mode.

When the RESET pin is restored to the HIGH level, the oscillator start-up stabilization time is

generated by timer 1.

After the oscillator start-up stabilization time elapses, internal clock

φ is supplied to the CPU.

The program is executed at the address stored in the reset vector area.

For details of reset, refer to Section 1.17 Reset.

Recovery from Wait Mode by Interrupt

The wait mode is terminated, when an interrupt request is generated and its interrupt is acceptable

in the wait mode.

Next, internal clock

φ is resumed and supplied to the CPU.

The interrupt request used to terminate the wait mode is accepted and the interrupt service routine

is executed.

After the interrupt service routine is completed, the program is executed at the instruction following

the WIT instruction.

All interrupt sources except the BRK instruction interrupt, are available for recovering from the wait

mode.

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