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ST7787 Datasheet(PDF) 105 Page - Sitronix Technology Co., Ltd.

Part # ST7787
Description  262K Color Single-Chip TFT Controller/Driver
PDF  217 Pages
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Manufacturer  SITRONIX [Sitronix Technology Co., Ltd.]
Direct Link  http://www.sitronix.com.tw
Logo SITRONIX - Sitronix Technology Co., Ltd.

ST7787 Datasheet(HTML) 105 Page - Sitronix Technology Co., Ltd.

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ST7787
Ver. 1.7
2008.04.18
105
Table 10.1.3 System Function command List (3)
Instruction
Refer D/CXWRXRDX D17-8
D7
D6
D5
D4
D3
D2
D1
D0
(Hex)
Function
0
↑
1
-
0
0
1
1
0
0
0
0
(30h) Partial
start/end address set
1
↑
1
-
---
---
---
---
---
---
---
PSL8 00h
1
↑
1
-
PSL7 PSL6 PSL5 PSL4 PSL3 PSL2 PSL1 PSL0 00h
Partial start address 0,1,2,….,219
1
↑
1
-
---
---
---
---
---
---
---
PEL8 00h
PTLAR
10.1.25
1
↑
1
-
PEL7 PEL6 PEL5 PEL4 PEL3 PEL2 PEL1 PEL0 F0h
Partial end address 0,1,2,….,219
0
↑
1
-
0
0
1
1
0
0
1
1
(33h) Scroll area set
1
↑
1
-
---
---
---
---
---
---
---
TFA8
1
↑
1
-
TFA7 TFA6 TFA5 TFA4
TFA3 TFA2 TFA1 TFA0
Top fixed area 0,1,2,….,219
1
↑
1
-
---
---
---
---
---
---
---
VSA8
1
↑
1
-
VSA7 VSA6 VSA5 VSA4 VSA3 VSA2 VSA1 VSA0
Vertical scroll area 0,1,2,….,219
1
↑
1
-
---
---
---
---
---
---
---
BFA8
SCRLAR
10.1.26
1
↑
1
-
BFA7 BFA6 BFA5 BFA4 BFA3 BFA2 BFA1 BFA0
Bottom fixed area 0,1,2,….,219
TEOFF
10.1.27
0
↑
1
-
0
0
1
1
0
1
0
0
(34h) Tearing effect line off
0
↑
1
-
0
0
1
1
0
1
0
1
(35h) Tearing effect mode set & on
TEON
10.1.28
1
↑
1
-
---
---
---
---
---
---
---
M
M="0": Mode 1, M="1": Mode 2
0
↑
1
-
0
0
1
1
0
1
1
0
(36h) Memory data access control
MADCTL
10.1.29
1
↑
1
-
MY
MX
MV
ML
RGB
MH
---
---
soft rst
0
↑
1
-
0
0
1
1
0
1
1
1
(37h) Scroll start address of RAM
1
↑
1
-
---
---
---
---
---
---
---
SSA8
SSA=0,1,2,….,319
VSCSAD
10.1.30
1
↑
1
-
SSA7 SSA6 SSA5 SSA4 SSA3 SSA2 SSA1 SSA0 00h
IDMOFF
10.1.31
0
↑
1
-
0
0
1
1
1
0
0
0
(38h) Idle mode off
IDMON
10.1.32
0
↑
1
-
0
0
1
1
1
0
0
1
(39h) Idle mode on
0
↑
1
-
0
0
1
1
1
0
1
0
(3Ah) Interface pixel format
COLMOD
10.1.33
1
↑
1
-
VIPF3 VIPF2 VIPF1 VIPF0
---
IFPF2 IFPF1IFPF0
soft rst
0
↑
1
-
0
0
1
1
1
1
1
1
(3Fh)
1
↑
1
-
1
1
0
0
1
0
1
0
CAh
OTP_process 10.1.34
1
↑
1
-
0
0
0
0
0
0
INI
0
OTP-Process
0
↑
1
-
1
1
0
1
1
0
1
0
(DAh) Read ID1
1
1
↑
-
---
---
---
---
---
---
---
---
Dummy read
RDID1
10.1.35
1
1
↑
-
ID17
ID16
ID15
ID14
ID13
ID12
ID11 ID10
Read parameter
0
↑
1
-
1
1
0
1
1
0
1
1
(DBh) Read ID2
1
1
↑
-
---
---
---
---
---
---
---
---
Dummy read
RDID2
10.1.36
1
1
↑
-
ID27
ID26
ID25
ID24
ID23
ID22 ID21 ID20
Read parameter
0
↑
1
-
1
1
0
1
1
1
0
0
(DCh) Read ID3
1
1
↑
-
---
---
---
---
---
---
---
---
Dummy read
RDID3
10.1.37
1
1
↑
-
ID37
ID36
ID35
ID34
ID33
ID32 ID31 ID30
Read parameter
“-“: Don’t care
Note 1. After the H/W reset by RESX pin or S/W reset by SWRESET command, each internal register becomes default state (Refer
“RESET TABLE” section)
Note 2. Undefined commands are treated as NOP (00 h) command.
Note 3. B0 to D9 and DE to FF are for factory use of driver supplier. Note 4. Commands 10h, 12h, 13h, 20h, 21h, 26h, 28h, 29h, 30h, 33h,
36h (ML parameter only), 37h, 38h and 39h are updated during V-sync when Module is in Sleep Out Mode to avoid abnormal
visual effects. During Sleep In mode, these commands are updated immediately. Read status (09h), Read Display Power Mode
(0Ah), Read Display MADCTL (0Bh), Read Display Pixel Format (0Ch), Read Display Image Mode (0Dh), Read Display Signal
Mode (0Eh and Read Display Self Diagnostic Result (0Fh) of these commands are updated immediately both in Sleep In mode
and Sleep Out mode.



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