376 datasheet(87/95 Pages) INTEL

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376 EMBEDDED PROCESSOR

82 INSTRUCTION ENCODING

Overview

All instruction encodings are subsets of the general

instruction format shown in Figure 81 Instructions

consist of one or two primary opcode bytes possibly

an address specifier consisting of the ‘‘mod rm’’

byte and ‘‘scaled index’’ byte a displacement if re-

quired and an immediate data field if required

Within the primary opcode or opcodes smaller en-

coding fields may be defined These fields vary ac-

cording to the class of operation The fields define

such information as direction of the operation size

of the displacements register encoding or sign ex-

tension

Almost all instructions referring to an operand in

memory have an addressing mode byte following

the primary opcode byte(s) This byte the mod rm

byte specifies the address mode to be used Certain

encodings of the mod rm byte indicate a second

addressing byte the scale-index-base byte follows

the mod rm byte to fully specify the addressing

mode

Addressing modes can include a displacement im-

mediately following the mod rm byte or scaled in-

dex byte If a displacement is present the possible

sizes are 8 16 or 32 bits

If the instruction specifies an immediate operand

the immediate operand follows any displacement

bytes The immediate operand if specified is always

the last field of the instruction

Figure 81 illustrates several of the fields that can

appear in an instruction such as the mod field and

the rm field but the Figure does not show all fields

Several smaller fields also appear in certain instruc-

tions sometimes within the opcode bytes them-

selves Table 82 is a complete list of all fields ap-

pearing in the 80376 instruction set Further ahead

following Table 82 are detailed tables for each

field

TTTTTTTT TTTTTTTT modTTTr m

ss index base d32

l 16 l 8 l none data32 l 16 l 8 l none

0 7

765320

opcode

‘‘mod rm’’

‘‘s-i-b’’

address

immediate

(one or two bytes)

byte

displacement

data

(T represents an

(4 2 1 bytes

opcode bit)

or none)

mode specifier

Figure 81 General Instruction Format

Table 82 Fields within 80376 Instructions

Field Name

Description

Number of Bits

Specifies if Data is Byte or Full Size (Full Size is either 16 or 32 Bits

Specifies Direction of Data Operation

Specifies if an Immediate Data Field Must be Sign-Extended

reg

General Register Specifier

mod rm

Address Mode Specifier (Effective Address can be a General Register)

2 for mod

3 for rm

Scale Factor for Scaled Index Address Mode

index

General Register to be used as Index Register

base

General Register to be used as Base Register

sreg2

Segment Register Specifier for CS SS DS ES

sreg3

Segment Register Specifier for CS SS DS ES FS GS

tttn

For Conditional Instructions Specifies a Condition Asserted

or a Condition Negated

Note

Table 81 shows encoding of individual instructions

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