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376 Datasheet(PDF) 54 Page - Intel Corporation

Part # 376
Description  376TM HIGH PERFORMANCE 32-BIT EMBEDDED PROCESSOR
PDF  95 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

376 Datasheet(HTML) 54 Page - Intel Corporation

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376 EMBEDDED PROCESSOR
240182 – 31
NOTE
For maximum design flexibility the 80376 has no internal pull-up resistors on its outputs Your design may require an
external pullup on ADS and other 80376 outputs to keep them negated during float periods
Figure 416 Requesting Hold from Idle Bus
RESET DURING HOLD ACKNOWLEDGE
RESET being asserted takes priority over HOLD be-
ing asserted If RESET is asserted while HOLD re-
mains asserted the 80376 drives its pins to defined
states during reset as in Table 45 Pin State Dur-
ing Reset
and performs internal reset activity as
usual
If HOLD remains asserted when RESET is inactive
the 80376 enters the hold acknowledge state before
performing its first bus cycle provided HOLD is still
asserted when the 80376 processor would other-
wise perform its first bus cycle If HOLD remains as-
serted when RESET is inactive the BUSY input is
still sampled as usual to determine whether a self
test is being requested
FLOAT
Activating the FLT input floats all 80376 bidirectional
and output signals including HLDA Asserting FLT
isolates the 80376 from the surrounding circuitry
When an 80376 in a PQFP surface-mount package
is used without a socket it cannot be removed from
the printed circuit board The FLT input allows the
80376 to be electrically isolated to allow testing of
external circuitry This technique is known as ONCE
for ‘‘ON-Circuit Emulation’’
ENTERING AND EXITING FLOAT
FLT is an asynchronous active-low input It is recog-
nized on the rising edge of CLK2 When recognized
it aborts the current bus cycle and floats the outputs
of the 80376 (Figure 420) FLT must be held low for
a minimum of 16 CLK2 cycles Reset should be as-
serted and held asserted until after FLT is deassert-
ed This will ensure that the 80376 will exit float in a
valid state
Asserting the FLT input unconditionally aborts the
current bus cycle and forces the 80376 into the
FLOAT mode Since activating FLT unconditionally
forces the 80376 into FLOAT mode the 80376 is not
54



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