376 datasheet(24/95 Pages) INTEL

24 / 95 page

376 EMBEDDED PROCESSOR

32 Segmentation

Segmentation is one method of memory manage-

ment and provides the basis for protection in the

80376 Segments are used to encapsulate regions

of memory which have common attributes For ex-

ample all of the code of a given program could be

contained in a segment or an operating system ta-

ble may reside in a segment All information about

each segment is stored in an 8-byte data structure

called a descriptor All of the descriptors in a system

are contained in tables recognized by hardware

TERMINOLOGY

The following terms are used throughout the discus-

sion of descriptors privilege levels and protection

Privilege Level

One of the four hierarchical

privilege levels Level 0 is the most privileged

level and level 3 is the least privileged

RPL

Requestor Privilege Level

The privilege

level of the original supplier of the selector

RPL is determined by the least two significant

bits of a selector

DPL

Descriptor Privilege Level

This is the least

privileged level at which a task may access

that descriptor (and the segment associated

with that descriptor) Descriptor Privilege Lev-

el is determined by bits 65 in the Access

Right Byte of a descriptor

CPL

Current Privilege Level

The privilege level

at which a task is currently executing which

equals the privilege level of the code seg-

ment being executed CPL can also be deter-

mined by examining the lowest 2 bits of the

CS register except for conforming code seg-

ments

EPL

Effective Privilege Level

The effective

privilege level is the least privileged of the

RPL and the DPL EPL is the numerical maxi-

mum of RPL and DPL

Task One instance of the execution of a program

Tasks are also referred to as processes

DESCRIPTOR TABLES

The descriptor tables define all of the segments

which are used in an 80376 system There are three

types of tables on the 80376 which hold descriptors

the Global Descriptor Table Local Descriptor Table

and the Interrupt Decriptor Table All of the tables

are variable length memory arrays they can range in

size between 8 bytes and 64 Kbytes Each table can

hold up to 8192 8-byte descriptors The upper 13

bits of a selector are used as an index into the de-

scriptor table The tables have registers associated

with them which hold the 32-bit linear base address

and the 16-bit limit of each table

Each of the tables have a register associated with it

GDTR LDTR and IDTR see Figure 32 The LGDT

LLDT and LIDT instructions load the base and limit

of the Global Local and Interrupt Descriptor Tables

into the appropriate register The SGDT SLDT and

SIDT store these base and limit values These are

privileged instructions

240182 – 12

Figure 32 Descriptor Table Registers

Global Descriptor Table

The Global Descriptor Table (GDT) contains de-

scriptors which are possibly available to all of the

tasks in a system The GDT can contain any type of

segment descriptor except for interrupt and trap de-

scriptors Every 80376 system contains a GDT A

simple 80376 system contains only 2 entries in the

GDT a code and a data descriptor For maximum

performance

descriptor tables should begin on

even addresses

The first slot of the Global Descriptor Table corre-

sponds to the null selector and is not used The null

selector defines a null pointer value

Local Descriptor Table

LDTs contain descriptors which are associated with

a given task Generally operating systems are de-

signed so that each task has a separate LDT The

LDT may contain only code data stack task gate

and call gate descriptors LDTs provide a mecha-

nism for isolating a given task’s code and data seg-

ments from the rest of the operating system while

the GDT contains descriptors for segments which

are common to all tasks A segment cannot be ac-

cessed by a task if its segment descriptor does not

exist in either the current LDT or the GDT This pro-

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