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LAN9354 Datasheet(PDF) 38 Page - Microchip Technology

Part # LAN9354
Description  3-Port 10/100 Managed Ethernet Switch
PDF  487 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN9354 Datasheet(HTML) 38 Page - Microchip Technology

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LAN9354
DS00001926B-page 38
 2015 Microchip Technology Inc.
6.2
Resets
The device provides multiple hardware and software reset sources, which allow varying levels of the device to be reset.
All resets can be categorized into three reset types as described in the following sections:
• Chip-Level Resets
- Power-On Reset (POR)
- RST# Pin Reset
• Multi-Module Resets
- DIGITAL RESET (DIGITAL_RST)
• Single-Module Resets
- Port A PHY Reset
- Port B PHY Reset
- Virtual PHY Reset
- Switch Reset
- 1588 Reset
The device supports the use of configuration straps to allow automatic custom configurations of various device param-
eters. These configuration strap values are set upon de-assertion of all chip-level resets and can be used to easily set
the default parameters of the chip at power-on or pin (RST#) reset. Refer to Section 6.3, "Power Management," on
page 45 for detailed information on the usage of these straps.
Table 6-1 summarizes the effect of the various reset sources on the device. Refer to the following sections for detailed
information on each of these reset types.
TABLE 6-1:
RESET SOURCES AND AFFECTED DEVICE FUNCTIONALITY
Module/
Functionality
POR
RST#
Pin
Digital
Reset
25 MHz Oscillator
(1)
Voltage Regulators
(2)
Switch Fabric
XX
X
Switch Logic
XX
X
Switch Registers
XX
X
Switch MAC 0
XX
X
Switch MAC 1
XX
X
Switch MAC 2
XX
X
PHY A
XX
PHY B
XX
PHY Common
(3)
Voltage Supervision
(3)
PLL
(3)
Virtual PHY
XX
1588 Clock / Event Gen.
XX
X
1588 Timestamp Unit 0
XX
X
1588 Timestamp Unit 1
XX
X
1588 Timestamp Unit 2
XX
X
SMI Slave Controller
XX
X
I2C Slave
XX
X
PMI Master Controller
XX
X
Power Management
XX
X
Device EEPROM Loader
XX
X
Note
1:
POR is performed by the XTAL voltage regulator, not at the system level
2:
POR is performed internal to the voltage regulators
3:
POR is performed internal to the PHY
4:
Strap inputs are not re-latched, however Soft-straps are returned to their previously latched pin defaults before they
are potentially updated by the EEPROM values.
5:
Only those output pins that are used for straps



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