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LAN9354 Datasheet(PDF) 75 Page - Microchip Technology |
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LAN9354 Datasheet(HTML) 75 Page - Microchip Technology |
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75 / 487 page  2015 Microchip Technology Inc. DS00001926B-page 75 LAN9354 17 Power Management Interrupt Event (PME_INT) This interrupt is issued when a Power Management Event is detected as configured in the Power Management Control Register (PMT_CTRL). Writ- ing a '1' clears this bit. In order to clear this bit, all unmasked bits in the Power Management Control Register (PMT_CTRL) must first be cleared. Note: The Interrupt De-assertion interval does not apply to the PME interrupt. R/WC 0b 16:13 RESERVED RO - 12 GPIO Interrupt Event (GPIO) This bit indicates an interrupt event from the General Purpose I/O. The source of the interrupt can be determined by polling the General Purpose I/ O Interrupt Status and Enable Register (GPIO_INT_STS_EN) RO 0b 11:3 RESERVED RO - 2:1 RESERVED RO - 0 RESERVED RO - Bits Description Type Default |
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