LAN9354 datasheet(63/487 Pages) MICROCHIP

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 2015 Microchip Technology Inc.

DS00001926B-page 63

LAN9354

7.2

Hard-Straps

Hard-straps are latched upon Power-On Reset (POR) or pin reset (RST#) only. Unlike soft-straps, hard-straps always

have an associated pin and cannot be overridden by the EEPROM Loader. These straps are used as either direct con-

figuration values or as register defaults. Table 7-2 provides a list of all hard-straps and their associated pin. These

straps, along with their pin assignments are also fully defined in Section 3.0, "Pin Descriptions and Configuration," on

page 10.

manual_FC_strap_0

Port 0 Virtual PHY Manual Flow Control Enable Strap:

This

strap affects the default value of the following register bits:

• Asymmetric Pause and Symmetric Pause bits of the Vir-

tual PHY Auto-Negotiation Advertisement Register

(VPHY_AN_ADV)

Refer to the respective register definition sections for addi-

tional information.

TABLE 7-2:

HARD-STRAP CONFIGURATION STRAP DEFINITIONS

Strap Name

Description

Pins

eeprom_size_strap

EEPROM Size Strap:

Configures the EEPROM size range.

A low selects 1K bits (128 x 8) through 16K bits (2K x 8).

A high selects 32K bits (4K x 8) through 512K bits (64K x 8).

E2PSIZE

serial_mngt_mode_strap

Serial Management Mode Strap:

Configures the serial

management mode.

0 = SMI Managed Mode

1 = I2C Managed Mode

Refer to Section 2.0, "General Description," on page 8 for

additional information on the various modes of the device.

MNGT0

TABLE 7-1:

SOFT-STRAP CONFIGURATION STRAP DEFINITIONS (CONTINUED)

Strap Name

Description

Pin / Default Value

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