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LAN9354 Datasheet(PDF) 85 Page - Microchip Technology |
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LAN9354 Datasheet(HTML) 85 Page - Microchip Technology |
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85 / 487 page ![]() 2015 Microchip Technology Inc. DS00001926B-page 85 LAN9354 There are 4 possible matches of the technology abilities. In the order of priority these are: • 100M Full Duplex (Highest priority) • 100M Half Duplex • 10M Full Duplex • 10M Half Duplex (Lowest priority) If the full capabilities of the transceiver are advertised (100M, full-duplex), and if the link partner is capable of 10M and 100M, then Auto-Negotiation selects 100M as the highest performance mode. If the link partner is capable of half and full-duplex modes, then Auto-Negotiation selects full-duplex as the highest performance mode. Once a capability match has been determined, the link code words are repeated with the acknowledge bit set. Any dif- ference in the main content of the link code words at this time will cause Auto-Negotiation to re-start. Auto-Negotiation will also re-start if not all of the required FLP bursts are received. Writing the PHY x Auto-Negotiation Advertisement Register (PHY_AN_ADV_x) bits [8:5] allows software control of the capabilities advertised by the transceiver. Writing the PHY x Auto-Negotiation Advertisement Register (PHY_AN_AD- V_x) does not automatically re-start Auto-Negotiation. The Restart Auto-Negotiation (PHY_RST_AN) bit of the PHY x Basic Control Register (PHY_BASIC_CONTROL_x) must be set before the new abilities will be advertised. Auto-Nego- tiation can also be disabled via software by clearing the Auto-Negotiation Enable (PHY_AN) bit of the PHY x Basic Con- trol Register (PHY_BASIC_CONTROL_x). 9.2.6.1 Pause Flow Control The Switch Fabric MACs are capable of generating and receiving pause flow control frames per the IEEE 802.3 speci- fication. The PHY’s advertised pause flow control abilities are set via the Asymmetric Pause and Symmetric Pause bits of the PHY x Auto-Negotiation Advertisement Register (PHY_AN_ADV_x). This allows the PHY to advertise its flow con- trol abilities and Auto-Negotiate the flow control settings with its link partner. The default values of these bits are deter- mined via configuration straps as defined in Section 9.2.20.5, "PHY x Auto-Negotiation Advertisement Register (PHY_AN_ADV_x)," on page 111. 9.2.6.2 Parallel Detection If the device is connected to a device lacking the ability to Auto-Negotiate (i.e. no FLPs are detected), it is able to deter- mine the speed of the link based on either 100M MLT-3 symbols or 10M Normal Link Pulses. In this case the link is presumed to be half-duplex per the IEEE 802.3 standard. This ability is known as “Parallel Detection.” This feature ensures interoperability with legacy link partners. If a link is formed via parallel detection, then the Link Partner Auto- Negotiation Able bit of the PHY x Auto-Negotiation Expansion Register (PHY_AN_EXP_x) is cleared to indicate that the link partner is not capable of Auto-Negotiation. If a fault occurs during parallel detection, the Parallel Detection Fault bit of the PHY x Auto-Negotiation Expansion Register (PHY_AN_EXP_x) is set. The PHY x Auto-Negotiation Link Partner Base Page Ability Register (PHY_AN_LP_BASE_ABILITY_x) is used to store the Link Partner Ability information, which is coded in the received FLPs. If the link partner is not Auto-Negotiation capa- ble, then this register is updated after completion of parallel detection to reflect the speed capability of the link partner. 9.2.6.3 Restarting Auto-Negotiation Auto-Negotiation can be re-started at any time by setting the Restart Auto-Negotiation (PHY_RST_AN) bit of the PHY x Basic Control Register (PHY_BASIC_CONTROL_x). Auto-Negotiation will also re-start if the link is broken at any time. A broken link is caused by signal loss. This may occur because of a cable break, or because of an interruption in the signal transmitted by the Link Partner. Auto-Negotiation resumes in an attempt to determine the new link configuration. If the management entity re-starts Auto-Negotiation by setting the Restart Auto-Negotiation (PHY_RST_AN) bit of the PHY x Basic Control Register (PHY_BASIC_CONTROL_x), the device will respond by stopping all transmission/receiv- ing operations. Once the internal break_link_time is completed in the Auto-Negotiation state-machine (approximately 1200ms), Auto-Negotiation will re-start. In this case, the link partner will have also dropped the link due to lack of a received signal, so it too will resume Auto-Negotiation. Auto-Negotiation is also restarted after the EEPROM Loader updates the straps. 9.2.6.4 Disabling Auto-Negotiation Auto-Negotiation can be disabled by clearing the Auto-Negotiation Enable (PHY_AN) bit of the PHY x Basic Control Register (PHY_BASIC_CONTROL_x). The transceiver will then force its speed of operation to reflect the information in the PHY x Basic Control Register (PHY_BASIC_CONTROL_x) (Speed Select LSB (PHY_SPEED_SEL_LSB) and Duplex Mode (PHY_DUPLEX)). These bits are ignored when Auto-Negotiation is enabled. |
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