LAN9354 datasheet(20/487 Pages) MICROCHIP

20 / 487 page

LAN9354

DS00001926B-page 20

 2015 Microchip Technology Inc.

Note 6:

A series terminating resistor is recommended for the best PCB signal integrity.

Note 7:

Configuration strap pins are identified by an underlined symbol name. Configuration strap values are

latched on power-on reset or RST# de-assertion. Refer to Section 7.0, "Configuration Straps," on page 54

for more information.

Note 8:

An external supplemental pull-up may be needed, depending upon the input current loading of the external

MAC/PHY device.

Port 0 SMI/MII

Management

Data

Input/Output

P0_MDIO

VIS/VO8

SMI/MII Slave Management Modes:

This is the

management data to/from an external master and is

used to access port 0’s Virtual PHY, the two physical

PHYs and internal registers.

MII Master Management Modes:

This is the man-

agement data to/from an external PHY(s).

Note:

An external pull-up is required when the

SMI or MII management interface is

used, to ensure that the IDLE state of the

MDIO signal is a logic one.

Note:

An external pull-up is recommended

when the SMI or MII management inter-

face is not used, to avoid a floating sig-

nal.

Port 0 SMI/MII

Management

Clock

P0_MDC

VIS

SMI/MII Slave Management Modes:

This is the

management clock input from an external master

and is used to access port 0’s Virtual PHY, the two

physical PHYs and internal registers.

Note:

When SMI or MII is not used, an external

pull-down is recommended to avoid a

floating signal.

VO8

MII Master Management Modes:

This is the man-

agement clock output to an external PHY(s).

TABLE 3-6:

I2C MANAGEMENT PIN DESCRIPTIONS

Num

Pins

Name

Symbol

Buffer

Type

Description

I2C Slave

Serial Data

Input/Output

I2CSDA

VIS/VOD8

This pin is the I2C serial data input/output from/to

the external master

Note:

This pin must be pulled-up by an exter-

nal resistor at all times.

I2C Slave

Serial Clock

I2CSCL

VIS

This pin is the I2C clock input from the external mas-

ter.

Note:

These signals are not driven (high

impedance) until the EEPROM is

loaded.

TABLE 3-5:

SWITCH PORT 0 RMII & CONFIGURATION STRAP PIN DESCRIPTIONS

(CONTINUED)

Num

Pins

Name

Symbol

Buffer

Type

Description

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