LAN9354 datasheet(10/487 Pages) MICROCHIP

10 / 487 page

LAN9354

DS00001926B-page 10

 2015 Microchip Technology Inc.

3.0

PIN DESCRIPTIONS AND CONFIGURATION

3.1

56-QFN Pin Assignments

FIGURE 3-1:

56-QFN PIN ASSIGNMENTS (TOP VIEW)

Note:

When a “#” is used at the end of the signal name, it indicates that the signal is active low. For example,

RST# indicates that the reset signal is active low.

The buffer type for each signal is indicated in the “Buffer Type” column of the pin description tables in Sec-

tion 3.2, "Pin Descriptions". A description of the buffer types is provided in Section 1.2, "Buffer Types".

Note: Exposed pad (VSS) on bottom of package must be connected to ground with a via field.

(Connect exposed pad to ground with a via field)

VSS

LAN9354

56-QFN

( Top V i e w )

REG_EN

VDDCR

FXLOSEN

FXSDA/FXLOSA/FXSDENA

FXSDB/FXLOSB/FXSDENB

RST#

GPIO7

GPIO6

VDDIO

LED1/GPIO1/TDI

IRQ

P0_MDC

VDDIO

P0_DUPLEX

I2CSCL/EESCL/TCK

LED2/GPIO2/E2PSIZE

VDD33

OSCVSS

OSCVDD12

OSCO

I2CSDA/EESDA/TMS

TESTMODE

P0_MDIO

VDDCR

OSCI

VDDIO

LED3/GPIO3/EEEEN

LED0/GPIO0/TDO/MNGT0

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