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DS26401 Datasheet(PDF) 233 Page - Dallas Semiconductor

Part # DS26401
Description  Octal T1/E1/J1 Framer
PDF  309 Pages
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Manufacturer  DALLAS [Dallas Semiconductor]
Direct Link  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS26401 Datasheet(HTML) 233 Page - Dallas Semiconductor

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DS26401 Octal T1/E1/J1 Framer
233
11.12 E1 Transmit Per-Channel Idle Code Insertion
Channel data can be replaced by an idle code on a per-channel basis in the transmit and receive directions.
Thirty-two Transmit Idle Definition Registers (TIDR1-TIDR32) are provided to set the 8-bit idle code for each
channel. The Transmit Channel Idle Code Enable registers (TCICE1-4) are used to enable idle code replacement
on a per channel basis.
Register Name:
TIDR1 to TIDR32
Register Description:
Transmit Idle Code Definition Registers 1 to 32
Register Address:
120h to 13Fh [+ (200h x n) : where n = 0 to 7, for Ports 1 to 8]
Bit #
7
6
5
4
3
2
1
0
Name
C7
C6
C5
C4
C3
C2
C1
C0
Default
0
0
0
0
0
0
0
0
Bits 0 to 7 / Per-Channel Idle Code Bits (C0 to C7).
C0 is the LSB of the Code (this bit is transmitted last).
Address 120H is for channel 1; address 13FH is for channel 32.
Register Name:
TCICE1, TCICE2, TCICE3, TCICE4
Register Description:
Transmit Channel Idle Code Enable Registers
Register Address:
150h, 151h, 152h, 153Hh [+ (200h x n) : where n = 0 to 7, for Ports 1
to 8]
The Transmit Channel Idle Code Enable Registers (TCICE1/2/3/4) are used to determine which of the 32 E1
channels should be overwritten with the code placed in the Transmit Idle Code Definition Register.
(MSB)
(LSB)
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
TCICE1
CH16
CH15
CH14
CH13
CH12
CH11
CH10
CH9
TCICE2
CH24
CH23
CH22
CH21
CH20
CH19
CH18
CH17
TCICE3
CH32
CH31
CH30
CH29
CH28
CH27
CH26
CH25
TCICE4
Bits 0 to 7 / Transmit Channels 1 to 32 Code Insertion Control Bits (CH1 to CH32)
0 = do not insert data from the Idle Code Array into the transmit data stream
1 = insert data from the Idle Code Array into the transmit data stream



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