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FS5502 Datasheet(PDF) 16 Page - NXP Semiconductors

Part # FS5502
Description  High voltage PMIC with multiple SMPS and LDO
PDF  113 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS5502 Datasheet(HTML) 16 Page - NXP Semiconductors

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NXP Semiconductors
FS5502
High voltage PMIC with multiple SMPS and LDO
10.4 M_MODE register
Bit
23
22
21
20
19
18
17
16
Write
0
0
0
0
0
0
0
0
Read
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
PLL_
LOCK_RT
Reset
0
0
0
0
0
0
0
0
Table 9. M_MODE register bit allocation
Bit
15
14
13
12
11
10
9
8
Write
0
EXT_
FIN_DIS
0
0
0
W2DIS
W1DIS
GoToSTBY
Read
EXT_FIN_
SEL_RT
RESERVED
MAIN_
NORMAL
RESERVED
RESERVED
W2DIS
W1DIS
RESERVED
Reset
0
0
1
0
0
0
0
0
Bit
Symbol
Description
Real time status of the PPL
0
PLL not locked
1
PLL locked
16
PLL_LOCK_RT
Reset condition: POR
Real time status of FIN clock selection
0
Internal clock oscillator is selected
1
External FIN clock is selected
15
EXT_FIN_SEL_RT
Reset condition: POR
Disable request of EXT FIN selection at PLL input
0
No effect
1
Disable FIN selection
14
EXT_FIN_DIS
Reset condition: POR
Main state machine status
0
Main state machine is not in Normal mode
1
Main state machine is in Normal mode
13
MAIN_NORMAL
Reset condition: POR
WAKE2 wake up disable
0
wake up enable
1
wake up disable
10
W2DIS
Reset condition: POR
WAKE1 wake up disable
0
Wake up enable
1
Wake up disable
9
W1DIS
Reset condition: POR
Table 10. M_MODE register bit description
FS5502
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 4 — 27 October 2021
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