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FS5502 Datasheet(PDF) 39 Page - NXP Semiconductors |
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FS5502 Datasheet(HTML) 39 Page - NXP Semiconductors |
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39 / 113 page  NXP Semiconductors FS5502 High voltage PMIC with multiple SMPS and LDO Bit Symbol Description Leave DEBUG mode 0 No action 1 Leave DEBUG mode 22 DBG_EXIT Reset condition: POR DEBUG mode status 0 NOT in DEBUG mode 1 In DEBUG mode 21 DBG_MODE Reset condition: Real time information OTP bits corruption detection (5 ms cyclic check) 0 No error 1 OTP CRC error detected 19 OTP_CORRUPT Reset condition: POR / clear on write (write 1) INIT register corruption detection (real time comparison) 0 No error 1 INIT register content error detected (mismatch between FS_I_Register / FS_I_NOT_ Register) 16 7 REG_CORRUPT Reset condition: POR / clear on write (write 1) Report fail-safe state machine current state 0 0110 INIT_FS 12 to 8 FSM_STATE[4:0] Reset condition: Real time information Table 56. FS_STATES register bit description FS5502 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 4 — 27 October 2021 39 / 113 |
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