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FS5502 Datasheet(PDF) 23 Page - NXP Semiconductors

Part # FS5502
Description  High voltage PMIC with multiple SMPS and LDO
PDF  113 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS5502 Datasheet(HTML) 23 Page - NXP Semiconductors

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NXP Semiconductors
FS5502
High voltage PMIC with multiple SMPS and LDO
Bit
Symbol
Description
Inhibit INTERRUPT for VPRE_UVH
0
INT not masked
1
INT masked
10
VSUPUVH_M
Reset condition: POR
Inhibit INTERRUPT for WAKE1 any transition
0
INT not masked
1
INT masked
9
WAKE1_M
Reset condition: POR
Inhibit INTERRUPT for WAKE2 any transition
0
INT not masked
1
INT masked
8
WAKE2_M
Reset condition: POR
Table 20. M_INT_MASK2 register bit description...continued
10.10 M_FLAG1 register
Bit
23
22
21
20
19
18
17
16
Write
VBOSUVH
0
VPREOC
BUCK1OC
0
BUCK3OC
LDO1OC
0
Read
VBOSUVH
RESERVED
VPREOC
BUCK1OC
RESERVED
BUCK3OC
LDO1OC
RESERVED
Reset
1
1
0
0
0
0
0
0
Table 21. M_FLAG1 register bit allocation
Bit
15
14
13
12
11
10
9
8
Write
0
0
0
BUCK1OT
0
BUCK3OT
LDO1OT
0
Read
CLK_FIN_
DIV_OK
RESERVED
RESERVED
BUCK1OT
RESERVED
BUCK3OT
LDO1OT
RESERVED
Reset
0
0
0
0
0
0
0
0
Bit
Symbol
Description
VBOS undervoltage high event
0
No event
1
Event occurred
23
VBOSUVH
Reset condition: POR / Clear on Write (write 1)
VPRE overcurrent event
0
No event
1
Event occurred
21
VPREOC
Reset condition: POR / Clear on Write (write 1)
BUCK1 overcurrent event
0
No event
1
Event occurred
20
BUCK1OC
Reset condition: POR / Clear on Write (write 1)
Table 22. M_FLAG1 register bit description
FS5502
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 4 — 27 October 2021
23 / 113



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