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FS5502 Datasheet(PDF) 25 Page - NXP Semiconductors |
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FS5502 Datasheet(HTML) 25 Page - NXP Semiconductors |
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25 / 113 page ![]() NXP Semiconductors FS5502 High voltage PMIC with multiple SMPS and LDO Bit Symbol Description VPRE_FB_OV event 0 No event 1 Event occurred 23 VPRE_FB_OV Reset condition: POR / Clear on Write (write 1) VSUP_UV7 event 0 No event 1 Event occurred 22 VSUPUV7 Reset condition: POR / Clear on Write (write 1) BUCK1 state 0 Regulator OFF 1 Regulator ON 20 BUCK1_ST Reset condition: Real time information BUCK3 state 0 Regulator OFF 1 Regulator ON 18 BUCK3_ST Reset condition: Real time information LDO1 state 0 regulator OFF 1 regulator ON 17 LDO1_ST Reset condition: Real time information VPRE_UVL event 0 No event 1 Event occurred 15 VPREUVL Reset condition: POR / Clear on Write (write 1) VPRE_UVH event 0 No event 1 Event occurred 14 VPREUVH Reset condition: POR / Clear on Write (write 1) VSUP_UVL event 0 No event 1 Event occurred 13 VSUPUVL Reset condition: POR / Clear on Write (write 1) VSUP_UVH event 0 No event 1 Event occurred 12 VSUPUVH Reset condition: POR / Clear on Write (write 1) Report event: WAKE2 real time state 0 WAKE2 is low level 1 WAKE2 is high 11 WK2RT Reset condition: Real time information Table 24. M_FLAG2 register bit description FS5502 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 4 — 27 October 2021 25 / 113 |
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