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FS5502 Datasheet(PDF) 47 Page - NXP Semiconductors |
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FS5502 Datasheet(HTML) 47 Page - NXP Semiconductors |
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47 / 113 page ![]() NXP Semiconductors FS5502 High voltage PMIC with multiple SMPS and LDO Address Register Bit Symbol Value Description VDDIO overvoltage threshold configuration 0000 104.5 % 0001 105 % 0010 105.5 % 0011 106 % 0100 106.5 % 0101 107 % 0110 107.5 0111 108 % 1000 108.5 % 1001 109 % 1010 109.5 % 1011 110 % 1100 110.5 % 1101 111 % 1110 111.5 % 7 to 4 VDDIOOVTH[3:0] 1111 112 % VCOREMON overvoltage threshold configuration 0000 104.5 % 0001 105 % 0010 105.5 % 0011 106 % 0100 106.5 % 0101 107 % 0110 107.5 0111 108 % 1000 108.5 % 1001 109 % 1010 109.5 % 1011 110 % 1100 110.5 % 1101 111 % 1110 111.5 % 0B OTP_CFG_UVOV_2 3 to 0 VCOREOVTH[3:0] 1111 112 % VDDIO voltage selection 0 3.3 V 0C OTP_CFG_UVOV_3 5 VDDIO_V 1 5 V SVS max value allowed (mask) 00000 No SVS 00001 2 steps available 00011 4 steps available 00111 8 steps available 0C OTP_CFG_UVOV_3 4 to 0 VCORE_SVS_CLAMP[4:0] 01111 16 steps available Table 60. Fail-safe OTP bit description...continued FS5502 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 4 — 27 October 2021 47 / 113 |
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