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FS5502 Datasheet(PDF) 93 Page - NXP Semiconductors

Part # FS5502
Description  High voltage PMIC with multiple SMPS and LDO
PDF  113 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS5502 Datasheet(HTML) 93 Page - NXP Semiconductors

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NXP Semiconductors
FS5502
High voltage PMIC with multiple SMPS and LDO
TA = −40 °C to 125 °C, unless otherwise specified. VSUP = VSUP_UVH to 36 V, unless otherwise specified. All voltages referenced to
ground.
Symbol
Parameter
Min
Typ
Max
Unit
PGOODVIL
Low level input voltage threshold
1.0
—
—
V
PGOODVIH
High level input voltage threshold
—
—
2.0
V
PGOODHYST
Input voltage hysteresis
100
—
—
mV
PGOODVOL
Low level output voltage (I = 2.0 mA)
—
—
0.5
V
PGOODRPD
Internal pull-down resistor
200
400
800
kΩ
PGOODILIM
Current limitation
4.0
—
20
mA
PGOODTFB
Feedback filtering time
8.0
—
15
μs
Table 90. PGOOD electrical characteristics
27.4.2 RSTB
RSTB is an open-drain output that can be connected in the application to the RESET of
the MCU. RSTB requires an external pull-up resistor to VDDIO and a filtering capacitor
to GND for immunity. An internal pull-down RPD ensure RSTB low level in Standby and
Power down mode. RSTB assertion depends on the device configuration during INIT_FS
phase. An internal pull up on the gate of the low-side MOS ensures RSTB low level in
case of FS_LOGIC failure. When RSTB is stuck low for more than RSTBT8S, the device
transitions in DEEP-FS mode.
aaa-031029
FS_LOGIC
VSUP
RSTB
to MCU reset
VDDIO
RPD
5.1 kΩ
1 nF
Figure 36. RSTB pin implementation
FS5502
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 4 — 27 October 2021
93 / 113



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