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FS5502 Datasheet(PDF) 26 Page - NXP Semiconductors |
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FS5502 Datasheet(HTML) 26 Page - NXP Semiconductors |
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26 / 113 page ![]() NXP Semiconductors FS5502 High voltage PMIC with multiple SMPS and LDO Bit Symbol Description Report event: WAKE1 real time state 0 WAKE1 is low level 1 WAKE1 is high 10 WK1RT Reset condition: Real time information WAKE2 wake up source flag 0 No event 1 Event occurred 9 WK2FLG Reset condition: POR / Clear on Write (write 1) WAKE1 wake up source flag 0 No event 1 Event occurred 8 WK1FLG Reset condition: POR / Clear on Write (write 1) Table 24. M_FLAG2 register bit description...continued 10.12 M_VMON_REGx register Bit 23 22 21 20 19 18 17 16 Write 0 0 0 0 0 0 0 0 Read RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED Reset 0 0 0 0 0 0 0 0 Table 25. M_VMON_REGx register bit allocation Bit 15 14 13 12 11 10 9 8 Write 0 0 0 0 0 VMON1_REG[2:0] Read RESERVED RESERVED RESERVED RESERVED RESERVED VMON1_REG[2:0] Reset 0 0 0 0 0 0 0 0 Bit Symbol Description Regulator assignment to VMON1 000 External regulator 001 VPRE 010 LDO1 011 RESERVED 100 RESERVED 101 BUCK3 11x External regulator 10 to 8 VMON1_REG[2:0] Reset condition: POR Table 26. M_VMON_REGx register bit description FS5502 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 4 — 27 October 2021 26 / 113 |
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