Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

FS5502 Datasheet(PDF) 18 Page - NXP Semiconductors

Part # FS5502
Description  High voltage PMIC with multiple SMPS and LDO
PDF  113 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS5502 Datasheet(HTML) 18 Page - NXP Semiconductors

Back Button FS5502 Datasheet HTML 14Page - NXP Semiconductors FS5502 Datasheet HTML 15Page - NXP Semiconductors FS5502 Datasheet HTML 16Page - NXP Semiconductors FS5502 Datasheet HTML 17Page - NXP Semiconductors FS5502 Datasheet HTML 18Page - NXP Semiconductors FS5502 Datasheet HTML 19Page - NXP Semiconductors FS5502 Datasheet HTML 20Page - NXP Semiconductors FS5502 Datasheet HTML 21Page - NXP Semiconductors FS5502 Datasheet HTML 22Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 18 / 113 page
background image
NXP Semiconductors
FS5502
High voltage PMIC with multiple SMPS and LDO
Bit
Symbol
Description
0
No effect (regulator remains in existing state)
1
VPRE enable request (after a VPDIS request)
Reset condition: POR
Enable request of BUCK1
0
No effect (regulator remains in existing state)
1
BUCK1 enable request
12
BUCK1EN
Reset condition: POR
Enable request of BUCK3
0
No effect (regulator remains in existing state)
1
BUCK3 enable request
10
BUCK3EN
Reset condition: POR
Enable request of LDO1
0
No effect (regulator remains in existing state)
1
LDO1 enable request
9
LDO1EN
Reset condition: POR
Table 12. M_REG_CTRL1 register bit description...continued
10.6 M_REG_CTRL2 register
Bit
23
22
21
20
19
18
17
16
Write
0
0
0
BUCK1T
SDCFG
0
BUCK3T
SDCFG
LDO1T
SDCFG
0
Read
RESERVED
RESERVED
RESERVED
BUCK1T
SDCFG
RESERVED
BUCK3T
SDCFG
LDO1T
SDCFG
RESERVED
Reset
OTP
OTP
OTP
OTP
OTP
OTP
OTP
OTP
Table 13. M_REG_CTRL2 register bit allocation
Bit
15
14
13
12
11
10
9
8
Write
0
0
0
VPRESRLS[1:0]
0
VPRESRHS[1:0]
Read
RESERVED
RESERVED
RESERVED
VPRESRLS[1:0]
RESERVED
VPRESRHS[1:0]
Reset
0
0
0
1
1
0
OTP
OTP
Bit
Symbol
Description
BUCK1 behavior in case of TSD
0
Regulator shutdown
1
Regulator shutdown and state machine transition to DEEP-FS
20
BUCK1TSDCFG
Reset condition: POR
BUCK3 behavior in case of TSD
0
Regulator shutdown
1
Regulator shutdown and state machine transition to DEEP-FS
18
BUCK3TSDCFG
Reset condition: POR
Table 14. M_REG_CTRL2 register bit description
FS5502
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 4 — 27 October 2021
18 / 113



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com