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FS5502 Datasheet(PDF) 13 Page - NXP Semiconductors |
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FS5502 Datasheet(HTML) 13 Page - NXP Semiconductors |
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13 / 113 page ![]() NXP Semiconductors FS5502 High voltage PMIC with multiple SMPS and LDO Address Register M/FS Adr_5 Adr_4 Adr_3 Adr_2 Adr_1 Adr_0 R/W I2C Read / Write Reference FS_GRL_FLAGS 1 0 0 0 0 0 0 1 Read only Section 11.3 FS_I_OVUV_SAFE_REACTION1 1 0 0 0 0 0 1 1/0 Write during INIT then Read only Section 11.4 FS_I_NOT_OVUV_SAFE_REACTION1 1 0 0 0 0 1 0 1/0 Write during INIT then Read only FS_I_OVUV_SAFE_REACTION2 1 0 0 0 0 1 1 1/0 Write during INIT then Read only Section 11.5 FS_I_NOT_OVUV_SAFE_REACTION2 1 0 0 0 1 0 0 1/0 Write during INIT then Read only FS_I_FSSM 1 0 0 1 0 0 1 1/0 Write during INIT then Read only FS_I_NOT_FSSM 1 0 0 1 0 1 0 1/0 Write during INIT then Read only FS_I_SVS 1 0 0 1 0 1 1 1/0 Write during INIT then Read only Section 11.7 FS_I_NOT_SVS 1 0 0 1 1 0 0 1/0 Write during INIT then Read only FS_OVUVREG_STATUS 1 0 1 0 0 0 1 1/0 Read / Write Section 11.8 FS_SAFE_IOS 1 0 1 0 0 1 1 1/0 Read / Write Section 11.9 FS_DIAG 1 0 1 0 1 0 0 1/0 Read / Write Section 11.10 FS_INTB_MASK 1 0 1 0 1 0 1 1/0 Read / Write Section 11.11 FS_STATES 1 0 1 0 1 1 0 1/0 Read / Write Section 11.12 10 Main register mapping 10.1 Main writing registers overview bit 23 bit 22 bit 21 bit 20 bit 19 bit 18 bit 17 bit 16 Logic Register name bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8 0 0 0 0 0 0 0 0 M_FLAG 0 0 0 0 0 0 I2C_M_CRC I2C_M_REQ 0 0 0 0 0 0 0 0 M_MODE 0 EXT_FIN_DIS 0 0 0 W2DIS W1DIS GoToSTBY VPRE_PD_DIS VPDIS RESERVED BUCK1DIS RESERVED BUCK3DIS LDO1DIS RESERVED M_REG_CTRL1 0 VPEN RESERVED BUCK1EN RESERVED BUCK3EN LDO1EN RESERVED RESERVED RESERVED BUCK1TSDCFG RESERVED BUCK3TSDCFG LDO1TSDCFG RESERVED M_REG_CTRL2 0 0 0 VPRESRLS[1:0] 0 VPRESRHS[1:0] MOD_CONF FOUT_MUX_SEL[3:0] FOUT_PHASE[2:0] M_CLOCK FOUT_ CLK_SEL EXT_FIN_SEL FIN_DIV MOD_EN CLK_TUNE[3 :0] 0 VPREOC_M 0 BUCK1OC_M RESERVED BUCK3OC_M LDO1OC_M RESERVED M_INT_MASK1 0 0 RESERVED BUCK1TSD_M RESERVED BUCK3TSD_M LDO1TSD_M RESERVED 0 0 0 0 RESERVED VBOSUVH_M COM_M VPRE_ FB_OV_M M_INT_MASK2 RESERVED VSUPUV7 0 VPREUVH VSUPUVL_M VSUPUVH_M WAKE1_M WAKE2_M RESERVED RESERVED VPREOC BUCK1OC RESERVED BUCK3OC LDO1OC RESERVED M_FLAG1 0 RESERVED RESERVED BUCK1OT RESERVED BUCK3OT LDO1OT RESERVED VPRE_FB_OV VSUPUV7 0 0 0 0 0 0 M_FLAG2 VPREUVL VPREUVH VSUPUVL VSUPUVH 0 0 WK2FLG WK1FLG 0 0 0 0 0 0 0 0 M_VMON_REGX 0 0 0 0 0 VMON1_REG[2:0] M_MEMORY0 MEMORY0[15:0] Main M_MEMORY1 MEMORY1[15:0] Table 5. Main writing registers overview FS5502 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 4 — 27 October 2021 13 / 113 |
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